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Dive into the research topics where Che-Yang Chiang is active.

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Featured researches published by Che-Yang Chiang.


Applied Physics Express | 2013

InAs Thin-Channel High-Electron-Mobility Transistors with Very High Current-Gain Cutoff Frequency for Emerging Submillimeter-Wave Applications

Edward Yi Chang; Chien-I Kuo; Heng-Tung Hsu; Che-Yang Chiang; Yasuyuki Miyamoto

60 nm InAs high-electron-mobility transistors (HEMTs) with a thin channel, a thin InAlAs barrier layer, and a very high gate stem structure have been fabricated and characterized. The thickness of the channel, as well as that of the InAlAs barrier layer, was reduced to 5 nm. A stem height of 250 nm with a Pt-buried gate was used in the device configuration to reduce the parasitics. A high DC transconductance of 2114 mS/mm and a current-gain cutoff frequency (fT) of 710 GHz were achieved at VDS=0.5 V.


IEEE Electron Device Letters | 2014

Performance Enhancement of Flip-Chip Packaged AlGaN/GaN HEMTs Using Active-Region Bumps-Induced Piezoelectric Effect

Szu-Ping Tsai; Heng-Tung Hsu; Che-Yang Chiang; Yung-Yi Tu; Chia-Hua Chang; Ting-En Hsieh; Huan-Chung Wang; Shih-Chien Liu; Edward Yi Chang

We experimentally investigated the impact of different bump patterns on the output electrical characteristics of flip-chip (FC) bonded AlGaN/GaN high-electron mobility transistors in this letter. The bump patterns were designed and intended to provide different levels of tensile stress due to the mismatch in the coefficient of thermal expansion between the materials. After FC packaging, a maximum increase of 4.3% in saturation current was achieved compared with the bare die when proper arrangement of the bumps in active region was designed. In other words, a 17% improvement has been observed on the optimized bump pattern over the conventional bump pattern. To the best of our knowledge, this is the first letter that investigates the piezoelectric effect induced by FC bumps leading to the enhancement in device characteristics after packaging.


Japanese Journal of Applied Physics | 2012

Bias-Dependent Radio Frequency Performance for 40 nm InAs High-Electron-Mobility Transistor with a Cutoff Frequency Higher than 600 GHz

Faiz Aizad Fatah; Chien-I Kuo; Heng-Tung Hsu; Che-Yang Chiang; Ching-Yi Hsu; Yasuyuki Miyamoto; Edward Yi Chang

In this paper, we present the fabrication and characterization of 40 nm InAs-channel high-electron-mobility-transistor (HEMT) devices. Both DC and RF measurements were performed under various bias conditions. We have also extracted bias-dependent intrinsic device parameters to determine the optimum conditions of operation. It is concluded that a high current-gain cutoff frequency (fT) of 615 GHz can be achieved when the device is biased near the occurrence of impact ionization.


Japanese Journal of Applied Physics | 2013

Performance Evaluation of InGaSb/AlSb P-Channel High-Hole-Mobility Transistor Faricated Using BCl3 Dry Etching

Chia-Hui Yu; Heng-Tung Hsu; Che-Yang Chiang; Chien-I Kuo; Yasuyuki Miyamoto; Edward Yi Chang

In this study, we present the fabrication and characterization of InGaSb/AlSb p-channel high-hole-mobility-transistor devices using inductively coupled plasma (ICP) etching with BCl3 gas. Devices fabricated by the dry etching technique show good DC and RF performances. Radio-frequency (RF) performance for devices with different source-to-drain spacing (LSD) and gate length (Lg) were investigated. The fabricated 80-nm-gate-length p-channel device with 2-µm LSD exhibited a maximum drain current of 86.2 mA/mm with peak transconductance (gm) of 64.5 mS/mm. The current gain cutoff frequency (fT) was measured to be 15.8 GHz when the device was biased at VDS = -1.2 V and VGS = 0.4 V.


asia pacific microwave conference | 2012

Design and implementation of multi-octave low-noise power amplifier (LNPA) using HIFET configuration

Che-Yang Chiang; Heng-Tung Hsu

This paper reports an low-noise-power amplifier (LNPA) MMIC using HIFET (High-Voltage, High-Impedance FET) configuration with very broadband performance in terms of noise figure, output power and linearity. Based on 0.15μm pHEMT technology, this MMIC delivers a gain of 12.5 ± 1dB, 1.5 ~ 2.5 dB noise figure (NF), good impedance match with S11/S22 less than -10 dB, and over 15 dBm of output P1dB covering the entire 2 GHz to 13 GHz with 25% peak efficiency, at a bias voltage of 4 V. The proposed LNPA also demonstrates excellent thermal stability. The measured thermal-sensitivity coefficient for the small-signal gain is as low as 0.0144 dB/°C with respect to the temperature variation from -30°C to 150°C. The overall chip area is as small as 0.93 mm2 excluding test pads.


asia pacific microwave conference | 2012

Fabrication of AlGaN/GaN high electron mobility transistors (HEMTs) on silicon substrate with slant field plates using deep-UV lithography featuring 5W/mm power density at X-band

Chia-Hua Chang; Heng-Tung Hsu; Lu-Che Huang; Che-Yang Chiang; Edward Yi Chang

In this work, AlGaN/GaN HEMTs on silicon with slant field plate have been successfully fabricated using deep-UV lithography. By using an angle exposure technique, submicron T-shaped gates with slant sidewalls were achieved. The 0.6 × 100μm2 slant-field-plated AlGaN/GaN HEMT on silicon substrate exhibited a peak value of transconductance of 214 mS/mm and a breakdown voltage of 122 V. Through high-frequency measurements, the device revealed a current gain cutoff frequency (fT) of 24 GHz, a maximum oscillation frequency (fmax) of 49 GHz and an output power density of 5.0 W/mm at X-band.


Applied Physics Express | 2011

V-Band Flip-Chip Assembled Gain Block Using In0.6Ga0.4As Metamorphic High-Electron-Mobility Transistor Technology

Che-Yang Chiang; Heng-Tung Hsu; Chin-Te Wang; Chien-I Kuo; Heng-Shou Hsu; Edward Yi Chang

This study fabricated a 150 nm In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device with flip-chip packaging. The packaged device exhibited favorable DC characteristics with IDS = 350 mA/mm and a transconductance of 600 mS/mm at VDS = 0.5 V. A maximum available gain (MAG) of 6.5 dB at 60 GHz was achieved with 10 mW DC power consumption. A two-stage gain block was designed and fabricated. The gain block exhibited a small signal gain of 9 dB at 60 GHz with only 20 mW DC power consumption. Such superior performance is comparable to the mainstream submicron complimentary metal–oxide–semiconductor (CMOS) technology with lower power consumption.


Japanese Journal of Applied Physics | 2014

Monolithic wideband linear power amplifier with 45% power bandwidth using pseudomorphic high-electron-mobility transistors for long-term evolution application

Che-Yang Chiang; Heng-Tung Hsu; Edward Y. Chang

A fully integrated, monolithic, wideband linear power amplifier using pseudomorphic high-electron-mobility transistor (pHEMT) technology has been developed for long-term evolution (LTE) applications. Implemented through the stacked field-effect transistor (stacked-FET) configuration, the amplifier exhibited a small signal gain of 15 dB and an output power of 25 dBm at 1 dB compression (P1dB) with a power-added efficiency (PAE) of 36% from 1.7 to 2.7 GHz yielding 45% power bandwidth. Moreover, when tested under a 10 MHz LTE-modulated signal, the amplifier achieved a 3% error-vector-magnitude (EVM) at 23 dBm output power over the entire power bandwidth.


Applied Physics Express | 2013

Assessment of Thermal Impact on Performance of Metamorphic High-Electron-Mobility Transistors on Polymer Substrates Using Flip-Chip-on-Board Technology

Chin-Te Wang; Heng-Tung Hsu; Che-Yang Chiang; Edward Yi Chang; Wee-Chin Lim

In this study, we have fabricated and characterized an In0.6Ga0.4As metamorphic high-electron-mobility transistor (mHEMT) device packaged using flip-chip-on-board (FCOB) technology. A low-cost polymer substrate was adopted as the carrier for cost-effective purposes. The impact of bonding temperature on the device performance was also experimentally investigated. While the DC performance was not as sensitive, serious degradation in RF performance was observed at high bonding temperature. Such degradation was mainly due to the thermal-mechanical stress resulting from the mismatch in the coefficient of thermal expansion (CTE) between the GaAs chip and the polymer substrate. Quantitative assessment was also performed through equivalent circuit extraction from S-parameter measurements.


asia pacific microwave conference | 2012

Impact of bonding temperature on the performance of In 0.6 Ga 0.4 As Metamorphic High Electron Mobility Transistor (mHEMT) device packaged using Flip-Chip-on-Board (FCOB) technology

Che-Yang Chiang; Heng-Tung Hsu; Chien-I Kuo; Ching-Te Wang; Wee Chin Lim; Edward Yi Chang

In this study, we fabricated 150-nm In0.6Ga0.4As mHEMT devices using in-house fabrication process. The devices were packaged using FCOB technology on organic substrates. The packaged device exhibited favorable DC characteristics with IDS = 350 mA/mm and a transconductance of 600 mS/mm at VDS = 0.5V with a maximum available gain (MAG) 6.5 dB at 60 GHz. The impact of temperature setting during the bonding process on the DC and RF performance was experimentally investigated. RF performance degradation was observed at high bonding temperature due to the induced thermomechanical stress. The stress was mainly from the mismatch in the coefficient of thermal expansion (CTE) of the GaAs chip and organic substrate.

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Heng-Tung Hsu

National Chiao Tung University

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Edward Yi Chang

National Chiao Tung University

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Chien-I Kuo

National Chiao Tung University

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Chin-Te Wang

National Chiao Tung University

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Yasuyuki Miyamoto

Tokyo Institute of Technology

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Chia-Hua Chang

National Chiao Tung University

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Szu-Ping Tsai

National Chiao Tung University

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Wee-Chin Lim

National Chiao Tung University

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