Ching-Yi Hsu

Monolithic 3D CMOS Using Layered Semiconductors

Monolithic 3D integrated circuits using transition metal dichalcogenide materials and low-temperature processing are reported. A variety of digital and analog circuits are implemented on two sequentially integrated layers of devices. Inverter circuit operation at an ultralow supply voltage of 150 mV is achieved, paving the way to high-density, ultralow-voltage, and ultralow-power applications.

Photoluminescence associated with basal stacking faults in c-plane ZnO epitaxial film grown by atomic layer deposition

Basal plane stacking faults (BSFs) with density of ∼1 × 106 cm−1 are identified as the dominant defect in the annealed ZnO thin films grown on c-plane sapphire by atomic layer deposition. The dominant peak centered at 3.321 eV in low-temperature photoluminescence measurements is attributed to the emission from the BSFs. The emission mechanism is considered to be the confined indirect excitons in the region of quantum-well-like structure formed by the BSFs. The observed energy shift of 19 meV with respect to the BSF-bounded exciton at low temperature may be caused by the localization effect associated with the coupling between BSF quantum wells.

Low-resistance nonalloyed ohmic contacts on undoped ZnO films grown by pulsed-laser deposition

We report on the formation of nonalloyed Ti and Ni ohmic contacts to ZnO films grown by pulsed-laser deposition. The experimental results show a lower barrier height of the Ti/ZnO samples than that of the Ni/ZnO samples (due to the lower work function of Ti than Ni), suggesting the Fermi-level unpinning at the interfaces. Based on the thermionic-emission or the thermionic-field-emission model, we found weak barrier-height dependence of the contact resistivity, implying that the presence of hydroxide in ZnO (i.e. the formation of the narrow depletion region at the metal/ZnO interface) resulted in the excess current component related to tunnelling, which led to the formation of the low-resistance nonalloyed metal/ZnO contact. The measurement temperature dependence of the contact resistivity revealed that the dominant current transport mechanism is field emission.

The influence of dislocations on optical and electrical properties of epitaxial ZnO on Si (111) using a gamma-Al2O3 buffer layer

The structural, optical and electrical properties of the c-plane ZnO epitaxial films grown by pulsed laser deposition on a Si(111) substrate buffered with a thin layer of γ-Al2O3 were investigated by X-ray diffraction, transmission electron microscopy, photoluminescence (PL) and Hall measurements. Detailed structural investigation showed that the dominant structural defects in the ZnO films are threading dislocations (TDs). Experimental results manifest the edge- and screw-type of TDs influence the optical and electric properties differently; the intensity ratio between the PL yellow-green band to near band edge emission and the carrier concentration are affected mainly by the edge TD, and the FWHM of the near band edge emission is dominantly influenced by the screw TD.

Suppressing Non-Uniform Tunneling in InAs/GaSb TFET With Dual-Metal Gate

Non-uniformity in electric field causes early onset of tunneling near the edge of InAs/GaSb hetero-junction tunneling field-effect transistors. When a small area, often an edge, of the tunneling junction has a lower turn-on voltage, the steep switching characteristic is degraded. Fermi pinning at InAs surface greatly worsen the uniformity. We propose a dual-metal gate structure to address the non-uniformity issue. With proper choice of work functions, the dual-metal gate structure can effectively suppress the early onset of edge tunneling and significantly improve the subthreshold swing.

Two-dimensional to three-dimensional tunneling in InAs/AlSb/GaSb quantum well heterojunctions

We examine room temperature band-to-band tunneling in 2D InAs/3D GaSb heterostructures. Specifically, multi-subband, gate-controlled negative differential resistance is observed in InAs/AlSb/GaSb junctions. Due to spatial confinement in the 10 nm-thick InAs layer, tunneling contributions from two distinct subbands are observed as sharp steps in the current-voltage characteristics. It is shown that the relative position of the steps can be controlled via external gate bias. Additionally, the extracted separation in the subband energy agrees well with the calculated values. This is the first demonstration of a gate controlled tunneling diode with multiple subband contributions.

Effects of ultraviolet treatment on the contact resistivity and electronic transport at the Ti/ZnO interfaces

We report on the effect of ultraviolet (UV) treatment on the specific contact resistance (ρ) and electronic transport at the Ti/ZnO interfaces. The experimental results show the same barrier height of Ti/ZnO samples without UV treatment as Ti/ZnO samples with UV treatment and the higher ρ of Ti/ZnO samples with UV treatment than Ti/ZnO samples without UV treatment, suggesting the barrier-height independence of ρ. Based on the thermionic-emission model and x-ray photoelectron spectroscopy results, we found that the induced decrease in the number of the hydroxides at the surface region of ZnO by UV treatment resulted in decreases in the electron concentration near the surface region and the excess current component related to tunneling, increasing in ρ of Ti/ZnO samples.

Quantum Well InAs/AlSb/GaSb Vertical Tunnel FET With HSQ Mechanical Support

A type-III (broken gap) band alignment heterojunction vertical in-line InAs/AlSb/GaSb tunnel FET, including a 2-nm-thin AlSb tunneling barrier is demonstrated. The impact of overlap and underlap gate is studied experimentally and supported further by quasi-stationary 2-D TCAD Sentaurus device simulations. Hydrogen silsesquioxane is used as a novel mechanical support structure to suspend the 10-nm-thin InAs drain with enough undercut to be able to demonstrate an overlap gate architecture. The overlap gate InAs/AlSb/GaSb TFET shows an ON current density of 22 μA/μm2 at VGS = VDS = 0.4 V and the subthreshold slope is 194 mV/decade at room temperature and 46 mV/decade at 100 K.

Bias-Dependent Radio Frequency Performance for 40 nm InAs High-Electron-Mobility Transistor with a Cutoff Frequency Higher than 600 GHz

In this paper, we present the fabrication and characterization of 40 nm InAs-channel high-electron-mobility-transistor (HEMT) devices. Both DC and RF measurements were performed under various bias conditions. We have also extracted bias-dependent intrinsic device parameters to determine the optimum conditions of operation. It is concluded that a high current-gain cutoff frequency (fT) of 615 GHz can be achieved when the device is biased near the occurrence of impact ionization.

Effect of Gate Length on Device Performances of AlSb/InAs High Electron Mobility Transistors Fabricated Using BCl3 Dry Etching

In this paper, we present the development of a mesa isolation process for AlSb/InAs high electron mobility transistors (HEMTs) using inductively coupled plasma (ICP) etching with BCl3 gas. Devices with different gate lengths (Lg: 60, 100, and 200 nm) fabricated by this dry etching technique show good DC and RF performances. With an appropriate Lg/gate-channel distance ratio, the 200-nm-gate has very high peak transconductances of 781 mS/mm at VDS = 0.1 V and 2000 mS/mm at VDS = 0.5 V. Moreover, an extrinsic current gain cutoff frequency of 137 GHz and maximum oscillation frequency of 97 GHz were achieved at a drain bias voltage VDS = 0.3 V, indicating the great potential for such a device operating at high frequency with extremely low DC power consumption.