Christelle Veytizou

High-Performance Germanium

We report high-performance p-channel Ω-gate germanium (Ge) p-channel multigate field-effect transistor (MuGFET) with low-temperature Si₂H₆ surface passivation and Schottky-barrier nickel germanide (NiGe) metallic source/drain, fabricated on high-quality germanium-on-insulator (GeOI) substrates using sub-400°C process modules. As compared with other reported p-channel multigate Ge devices formed by top-down approaches, the Ge MuGFETs in this letter have a record-high ON-state current I_ON of ~450 μA/μm at V_GS - V_TH = -1 V and V_DS = - 1 V. High peak intrinsic saturation transconductance of ~740 μS/μm and low OFF-state current are reported. We also study the effect of fin or channel doping on Ge MuGFET performance. The simple MuGFET process developed using GeOI substrate would be a good reference for future 3-D Ge device fabrication.

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We demonstrate the integration of high performance p-channel Germanium Multiple-Gate Field-Effect Transistors (MuGFETs) on a Germanium-on-Insulator substrate. Detailed process conditions are documented in this paper. The effects of Ge fin doping concentration on the electrical performance of Ge MuGFETs are discussed, and this could be useful for further device optimization. It is found that a higher fin doping leads to better control of short-channel efforts of Ge MuGFETs but degrades the on-state current and transconductance. High on-state current for Ge MuGFETs is reported in this paper.

-Gate MuGFET With Schottky-Barrier Nickel Germanide Source/Drain and Low-Temperature Disilane-Passivated Gate Stack

This paper reports the first demonstration of 300 mm In0.53Ga0.47As-on-insulator (InGaAs-OI) substrates. The use of direct wafer bonding and the Smart Cut™ technology lead to the transfer of high quality InGaAs layer on large Si wafer size (300 mm) at low effective cost, taking into account the reclaim of the III–V on Si donor substrate. The optimization of the three key building blocks of this technology is detailed. (1) The III–V epitaxial growth on 300 mm Si wafers has been optimized to decrease the defect density. (2) For the first time, hydrogen-induced thermal splitting is made inside the indium phosphide (InP) epitaxial layer and a wide implantation condition ranges is observed on the contrary to bulk InP. (3) Finally a specific direct wafer bonding with alumina oxide has been chosen to avoid outgas diffusion at the alumina oxide/III–V compound interface.

Germanium Multiple-Gate Field-Effect Transistors Formed on Germanium-on-Insulator Substrate

We report the first demonstration of a p-channel Ω-gate Germanium (Ge) multiple-gate field-effect transistor (MuGFET) on a Germanium-on-Insulator (GeOI) substrate with in situ Boron (B)-doped Ge (Ge:B) raised source/drain (RSD). Detailed process optimization on epitaxial growth of Ge on patterned GeOI samples is discussed. Process integration of Ge:B RSD into Ge MuGFETs using a CMOS compatible process flow is documented. Electrical characteristics of Ge MuGFETs with RSD are reported.

300 mm InGaAs-on-insulator substrates fabricated using direct wafer bonding and the Smart Cut™ technology

High temperature annealing of SOI wafers in non-oxidized ambient leads to internal Buried Oxide (BOX) dissolution. The underlying mechanisms and kinetics of this effect are discussed. High quality SOI wafers with very thin BOX down to 2nm are demonstrated utilizing optimized annealing conditions. Hybrid SOI/bulk wafers are obtained by the new process applying silicon nitride mask on the wafer surface. Stability of SOI and Si3N4/SOI systems at high temperatures is discussed and optimized process window is determined.

Germanium Multiple-Gate Field-Effect Transistor With In Situ Boron-Doped Raised Source/Drain

In this work we demonstrate for the first time 300 mm InGaAs on Insulator (InGaAs-OI) substrates. A 30 nm thick InGaAs layer was successfully transferred using low temperature Direct Wafer Bonding (DWB) and the Smart CutTM technology. The epitaxial growing process has been optimized to reduce the surface roughness of the InGaAs film at around 1.5 nm RMS. HR-XRD characterization on the transferred InGaAs layer indicates that the layer remains crystalline.