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Dive into the research topics where Bich-Yen Nguyen is active.

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Featured researches published by Bich-Yen Nguyen.


international conference on ic design and technology | 2004

Integration challenges of new materials and device architectures for IC applications

Bich-Yen Nguyen; Aaron Thean; Ted R. White; A. Vandooren; Mariam G. Sadaka; Leo Mathew; Alexander L. Barr; S. Thomas; M. Zalava; Da Zhang; D. Eades; Zhong-Hai Shi; J. Schaeffer; Dina H. Triyoso; S. Samavedam; Victor H. Vartanian; T. Stephen; Brian J. Goolsby; Stefan Zollner; R. Liu; R. Noble; Thien T. Nguyen; Veeraraghavan Dhandapani; B. Xie; Xang-Dong Wang; Jack Jiang; Raj Rai; M. Sadd; M.E. Ramon; S. Kalpat

In this paper, we will detail the issues with new materials being introduced into CMOS devices and present some potential solutions to enable high performance and low power CMOS for the 65nm node and beyond.


Archive | 2007

Inverse slope isolation and dual surface orientation integration

Mariam G. Sadaka; Debby Eades; J. Mogab; Bich-Yen Nguyen; Melissa O. Zavala; Gregory S. Spencer


Archive | 2006

Selective uniaxial stress modification for use with strained silicon on insulator integrated circuit

Voon-Yew Thean; Bich-Yen Nguyen; Da Zhang


Archive | 2007

SEMICONDUCTOR FABRICATION PROCESS USING ETCH STOP LAYER TO OPTIMIZE FORMATION OF SOURCE/DRAIN STRESSOR

Da Zhang; Ted R. White; Bich-Yen Nguyen


Archive | 2009

Modified hybrid orientation technology

Olubunmi O. Adetutu; Mariam G. Sadaka; Ted R. White; Bich-Yen Nguyen


Archive | 2006

Twisted Dual-Substrate Orientation (DSO) Substrates

Ted R. White; Leo Mathew; Bich-Yen Nguyen; Zhonghai Shi; Voon-Yew Thean; Mariam G. Sadaka


Archive | 2006

SELECTIVE STRESS RELAXATION BY AMORPHIZING IMPLANT IN STRAINED SILICON ON INSULATOR INTEGRATED CIRCUIT

Bich-Yen Nguyen; Voon-Yew Thean


Archive | 2005

Method for forming a semiconductor structure and structure thereof

Voon-Yew Thean; Jian Chen; Bich-Yen Nguyen; Mariam G. Sadaka; Da Zhang


Archive | 2005

Electronic devices including a semiconductor layer and a process for forming the same

Voon-Yew Thean; Brian J. Goolsby; Linda B. McCormick; Bich-Yen Nguyen; Colita M. Parker; Mariam G. Sadaka; Victor H. Vartanian; Ted R. White; Melissa O. Zavala


Archive | 2005

Asymmetric spacers and asymmetric source/drain extension layers

Leo Mathew; Yang Du; Bich-Yen Nguyen; Voon-Yew Thean

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Ted R. White

Freescale Semiconductor

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Da Zhang

Freescale Semiconductor

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Leo Mathew

Freescale Semiconductor

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