Christine P. Chen

WDM-compatible mode-division multiplexing on a silicon chip

Significant effort in optical-fibre research has been put in recent years into realizing mode-division multiplexing (MDM) in conjunction with wavelength-division multiplexing (WDM) to enable further scaling of the communication bandwidth per fibre. In contrast, almost all integrated photonics operate exclusively in the single-mode regime. MDM is rarely considered for integrated photonics because of the difficulty in coupling selectively to high-order modes, which usually results in high inter-modal crosstalk. Here we show the first microring-based demonstration of on-chip WDM-compatible mode-division multiplexing with low modal crosstalk and loss. Our approach can potentially increase the aggregate data rate by many times for on-chip ultrahigh bandwidth communications.

A 60 Gb/s MDM-WDM Si photonic link with < 0.7 dB power penalty per channel

Mode-division-multiplexing (MDM) and wavelength-division-multiplexing (WDM) are employed simultaneously in a multimode silicon waveguide to realize on-chip MDM and MDM-WDM transmission. Asymmetric Y-junction MDM multiplexers and demultiplexers are utilized for low coherently suppressed demultiplexed crosstalk at the receiver. We demonstrate aggregate bandwidths of 20 Gb/s and 60 Gb/s for MDM and MDM-WDM on-chip links, respectively, with measured 10(-9) BER power penalties between 0.1 dB and 0.7 dB per channel.

Optimization of microring-based filters for dense WDM silicon photonic interconnects

The article describes an experimentally validated approach for optimizing wavelength-selective microring filters based on optical signals power penalties. The methodology is used to analyze the performance of WDM links for various bit rates and channel-spacing.

Mode and Polarization Multiplexing in a Si Photonic Chip at 40Gb/s Aggregate Data Bandwidth

An on-chip error-free 40-Gb/s-aggregated-data-rate link is achieved by transmitting a single wavelength of dual polarization-multiplexed (pol-mux) data at 10 Gb/s through a two-mode mode-division-multiplexing (MDM) chip, with a power penalty of <;5 dB/channel. This is the first system-level experimental demonstration of combining pol-mux with MDM to enhance the performance of an on-chip Si photonics network, illustrating the potential to reduce total system electrical power budget by enabling multiple data channels with a single laser.

Si⁺-implanted Si-wire waveguide photodetectors for the mid-infrared.

CMOS-compatible Si⁺-implanted Si-waveguide p-i-n photodetectors operating at room temperature and at mid-infrared wavelengths from 2.2 to 2.3 µm are demonstrated. Responsivities of 9.9 ± 2.0 mA/W are measured at a 5 V reverse bias with an estimated internal quantum efficiency of 2.7 - 4.5%. The dark current is found to vary from a few microamps down to less than a nanoamp after a post-implantation annealing of 350°C. The measured photocurrent dependence on input power shows a linear correspondence over more than three decades, and the frequency response of a 250 µm-length p-i-n device is measured to be ~1.7 GHz for a wavelength of λ = 2.2 µm, thus potentially opening up new communication bands for photonic integrated circuits.

Programmable Dynamically-Controlled Silicon Photonic Switch Fabric

Dynamically-controlled optical switches can enable novel functionalities in future high-performance computing and data center systems, including resource allocation and real-time routing. These capabilities can improve system robustness, performance, as well as overall power consumption. Silicon (Si) photonic switch fabrics are capable of nanosecond-scale switching, thus making them potentially attractive for dynamic reconfiguration at data packet rates, which are typically in the GHz range and are made via CMOS-compatible processes for smooth process integration. In this paper, we explore the dynamic control of data signals through an Si photonic switch matrix and demonstrate a programming interface for configuring the switch. Our associated control algorithm is shown to provide the capability for dynamically reallocating the optical power through multicasting for robust operation in case the optical loss changes along a given path. The scheme is shown to operate error-free with 40 Gb/s line rate data streams in a 4×4 Si photonic switch fabric.

Experimental demonstration of coherent perfect absorption in a silicon photonic racetrack resonator

We present the first experimental demonstration of coherent perfect absorption (CPA) in an integrated device using a silicon racetrack resonator at telecommunication wavelengths. Absorption in the racetrack is achieved by Si+-ion-implantation, allowing for phase controllable amplitude modulation at the resonant wavelength. The device is measured to have an extinction of 24.5 dB and a quality-factor exceeding 3000. Our results will enable integrated CPA devices for data modulation and detection.

Flexfly: enabling a reconfigurable dragonfly through silicon photonics

The Dragonfly topology provides low-diameter connectivity for high-performance computing with all-to-all global links at the inter-group level. Our traffic matrix characterization of various scientific applications shows consistent mismatch between the imbalanced group-to-group traffic and the uniform global bandwidth allocation of Dragonfly. Though adaptive routing has been proposed to utilize bandwidth of non-minimal paths, increased hops and cross-group interference lower efficiency. This work presents a photonic architecture, Flexfly, which “trades” global links among groups using low-radix Silicon photonic switches. With transparent optical switching, Flexfly reconfigures the inter-group topology based on traffic pattern, stealing additional direct bandwidth for communication-intensive group pairs. Simulations with applications such as GTC, Nekbone and LULESH show up to 1.8× speedup over Dragonfly paired with UGAL routing, along with halved hop count and latency for cross-group messages. We built a 32-node Flexfly prototype using a Silicon photonic switch connecting four groups and demonstrated 820 ns interconnect reconfiguration time.

Experimental Demonstration of Spatial Scaling for High-Throughput Transmission Through A Si Mode-Division-Multiplexing Waveguide

Scaling the throughput through a multimode waveguide is experimentally demonstrated by extending operation from 2 to 3 spatial modes. The asymmetric, y-junction device is shown to support transmission of an aggregate bandwidth of 3x10-Gb/s data.

Hardware–Software Integrated Silicon Photonics for Computing Systems

A wealth of high-bandwidth and energy-efficient silicon photonic devices have been demonstrated in recent years. These represent promising solutions for high-performance computer systems that need to distribute extremely large amounts of data in an energy-efficient manner. Chip-scale optical interconnects that employ novel silicon photonics devices can potentially leapfrog the performance of traditional electronic-interconnected systems. However, the benefits of silicon photonics at a system level have yet to be realized. This chapter reviews methodologies for integrating silicon photonic interconnect technologies with computing systems, including implementation challenges associated with device characteristics. A fully functional co-integrated hardware–software system needs to encompass device functionality, control schema, and software logic seamlessly. Each layer, ranging from individual device characterization, to higher layer control of multiple devices, to arbitration of networks of devices, and ultimately to encapsulation of subsystems to create the entire computing system is explored. Finally, results and implications at each level of the system stack are presented.