Chukwudi A. Okoro

A Detailed Failure Analysis Examination of the Effect of Thermal Cycling on Cu TSV Reliability

In this paper, the reliability of through-silicon via (TSV) daisy chains under thermal cycling conditions was examined. The electrical resistance of TSV daisy chains was found to increase with the number of thermal cycles, due to thermally induced damage leading to the formation and growth of defects. The contributions of each identified damage type to the change in the electrical resistance of the TSV chain were evaluated by electrical modeling. Thermo-mechanical modeling showed a good correlation between the observed damage locations and the simulated stress-concentration regions of the TSV.

Synchrotron-based measurement of the impact of thermal cycling on the evolution of stresses in Cu through-silicon vias

One of the main causes of failure during the lifetime of microelectronics devices is their exposure to fluctuating temperatures. In this work, synchrotron-based X-ray micro-diffraction is used to study the evolution of stresses in copper through-silicon via (TSV) interconnects, “as-received” and after 1000 thermal cycles. For both test conditions, significant fluctuations in the measured normal and shear stresses with depth are attributed to variations in the Cu grain orientation. Nevertheless, the mean hydrostatic stresses in the “as-received” Cu TSV were very low, at (16 ± 44) MPa, most likely due to room temperature stress relaxation. In contrast, the mean hydrostatic stresses along the entire length of the Cu TSV that had undergone 1000 thermal cycles (123 ± 37) MPa were found to be eight times greater, which was attributed to increased strain-hardening. The evolution in stresses with thermal cycling is a clear indication that the impact of Cu TSVs on front-end-of-line (FEOL) device performance will change through the lifetime of the 3D stacked dies, and ought to be accounted for during FEOL keep-out-zone design rules development.

Nondestructive Measurement of the Residual Stresses in Copper Through-Silicon Vias Using Synchrotron-Based Microbeam X-Ray Diffraction

In this paper, we report a new method for achieving depth resolved determination of the full stress tensor in buried Cu through-silicon vias (TSVs), using a synchrotron-based X-ray microdiffraction technique. Two adjacent Cu TSVs were analyzed; one capped with SiO2 (0.17 μm) and the other without. The uncapped Cu TSV was found to have higher stresses with an average hydrostatic stress value of 145 ± 37 MPa, as compared with the capped Cu TSV, which had a value of 89 ± 28 MPa. Finite element-based parametric analyses of the effect of cap thickness on TSV stress were also performed. The differences in the stresses in the adjacent Cu TSVs were attributed to their microstructural differences and not to the presence of a cap layer. Based on the experimentally determined stresses, the stresses in the surrounding Si for both Cu TSVs were calculated and the FinFET keep-out-zone (KOZ) from the Cu TSV was estimated. The FinFET KOZ is influenced by the microstructural variations in their neighboring Cu TSVs, thus, it should be accounted for in KOZ design rules.

Full elastic strain and stress tensor measurements from individual dislocation cells in copper through-Si vias

A ground breaking new capability for measuring complete strain and stress tensors nondestructively from deeply buried, sub-micrometre sample volumes within microstructurally complex and multicomponent specimens is presented. The method is demonstrated on technologically important copper through-Si vias that are used in advanced three-dimensional microelectronics.

Accelerated Stress Test Assessment of Through-Silicon Via Using RF Signals

In this paper, radio frequency signal is demonstrated as an effective probe for assessing the effect of thermal cycling on the reliability of through-silicon vias (TSVs) in stacked dies. It is found that the RF signal integrity in TSV daisy chain, particularly its transmission characteristics, degrades considerably with extended thermal cycling, because of the formation and the growth of voids. Early failures are observed in the reliability analysis of the TSV daisy chain and are attributed to processing-related variability across the wafer. However, the maximum failure rate is found to occur at 500 thermal cycles, which is attributed to the initiation of defects and their subsequent propagation.

X-ray micro-beam diffraction determination of full stress tensors in Cu TSVs

We report the first non-destructive, depth resolved determination of the full stress tensor in Cu through-silicon vias (TSVs), using synchrotron based micro-beam X-ray diffraction. Two adjacent Cu TSVs were studied; one deliberately capped with SiO2, the other without (uncapped). Both Cu TSVs were found to be in a state of tensile hydrostatic stress that fluctuated considerably with depth. The average hydrostatic stress across the capped and the uncapped Cu TSVs was found to be (99 MPa ± 13 MPa) and (118 MPa ± 18 MPa), respectively. This apparent disparity between the mean hydrostatic stresses is attributed to local differences in their microstructure, and not to the differences in capping.

Effect of thermal cycling on the signal integrity and morphology of TSV isolation liner- SiO 2

This study is focused on understanding the effect of thermal cycling on the signal integrity characteristics of TSV isolation liner (SiO2). The use of radio frequency (RF) signals is found to be a good metrology tool for the detection of discontinuities in the SiO2 isolation liner. Signal degradation is found to scale with the attained number of thermal cycles. Atomic force microscopy (AFM) analysis revealed that void formation and growth in the SiO2 isolation liner is the root cause for this observed trend. Therefore the life time of TSVs will be significantly affected by the SiO2 isolation liner, thus, their understanding, engineering and optimization will be essential for prolonged high performance TSVs.

Experimentally, how does Cu TSV diameter influence its stress state?

In this work, an experimental study of the influence of Cu through-silicon via (TSV) diameter on stress build up was performed using synchrotron-based X-ray microdiffraction technique. Three Cu TSV diameters were studied; 3 μm, 5 μm and 8 μm, all of which were fabricated in a single chip. Prior to the measurements, the die was annealed at 420 °C (30 min), yielding a fully grown and stable microstructure. The measured mean hydrostatic stresses in the Cu TSV were 185±14 MPa (3 μm Cu TSV diameter), 147±10 MPa (5 μm Cu TSV diameter) and 205±15 MPa (8 μm Cu TSV diameter). As such, no conclusive stress dependence on Cu TSV diameter was determined. This is attributed to stress relaxation mechanisms including plastic deformation, grain boundary sliding, dislocation motion and the formation of cracks/ voids which are otherwise neglected in many reported finite element modeling based studies. Additionally, this study underscores that the stress-strain behavior of Cu TSVs are significantly dependent on their thermal history and microstructural characteristics.

X-ray micro-beam diffraction measurement of the effect of thermal cycling on stress in Cu TSV: A comparative study

Microelectronic devices are subjected to constantly varying temperature conditions during their operational lifetime, which can lead to their failure. In this study, we examined the impact of thermal cycling on the evolution of stresses in Cu TSVs using synchrotron-based X-ray micro-diffraction. Two test conditions were analyzed: as-received and 1000 cycled samples. The principal and shear stresses in the 1000 cycled sample were five times greater than in the as-received sample. This was attributed to the increased strain hardening upon thermal cycling. The variation in stresses with thermal cycling is a clear indication that the impact of Cu TSV proximity on front-end-of-line (FEOL) device performance will fluctuate throughout the lifetime of the 3D stacked dies, and thus should be accounted for during FEOL keep-out-zone design rule development.

Use of RF-based technique as a metrology tool for TSV reliability analysis

In this work, radio frequency (RF) based measurement technique is used as a prognostic tool for the assessment of the effect of thermal cycling on the reliability of through-silicon via (TSV) stacked dies. It was found that RF signal integrity in TSV daisy chains degraded with thermal cycling. Focused ion beam (FIB) based failure analysis, showed that the root cause for this trend was due to the formation and propagation of voids with thermal cycling.