Chun-Won Byun

42.3: Transparent ZnO Thin Film Transistor for the Application of High Aperture Ratio Bottom Emission AM-OLED Display

We have fabricated 2.5″ QCIF+ bottom emission AM-OLED with aperture ratio of 59.6% using fully transparent ZnO-TFT array and highly conductive oxide/metal/oxide electrode for the first time. The bias stability of ZnO TFT was improved by optimizing ZnO deposition and first gate insulator process. Plasma free process for the gate insulator makes ZnO TFT very stable under electrical bias stress. The Vth shift was less than 0.3V after VDS=25 V and VGS=15 V application for 60 hours. Transparent ZnO TFT characteristics did not change noticeably under irradiation of visible light.

21.2: Al and Sn-Doped Zinc Indium Oxide Thin Film Transistors for AMOLED Back-Plane

We have fabricated the transparent bottom gate TFTs using Al and Sn-doped zinc indium oxide (AT-ZIO) as an active layer. The AT-ZIO active layer was deposited by RF magnetron sputtering at room temperature, and AT-ZIO TFT showed a field effect mobility of 15.6 cm2/Vs even before annealing. The mobility increased with increasing In2O3 content and post-annealing temperature. The AT-ZIO TFT exhibited afield effect mobility of 33 cm2/Vs, a sub-threshold swing of 0.08 V/dec, and an on/off current ratio of more than 109 after Al2O3 passivation and post-annealing. We have fabricated AMOLED panels with the bottom gate AT-ZIO TFT back-plane successfully.

Transparent Al–Zn–Sn–O thin film transistors prepared at low temperature

We have fabricated transparent bottom gate thin film transistors (TFTs) using Al-doped zinc tin oxide (AZTO) as active layers. The AZTO active layer was deposited by rf magnetron sputtering at room temperature. The AZTO TFT showed good TFT performance without postannealing. The field effect mobility and the subthreshold swing were improved by postannealing below 180 °C. The AZTO TFT exhibited a field effect mobility (μFET) of 10.1 cm2/V s, a turn-on voltage (Von) of 0.4 V, a subthreshold swing (S/S) of 0.6 V/decade, and an on/off ratio (Ion/Ioff) of 109.

Nonvolatile memory thin-film transistors using an organic ferroelectric gate insulator and an oxide semiconducting channel

Organic–inorganic hybrid-type nonvolatile memory thin-film transistors using an organic ferroelectric gate insulator and an oxide semiconducting active channel are a very promising solution to the memory devices having both features of low-cost and high-performance, which are embeddable into the next-generation flexible and transparent electronics. In this paper, we discuss some important issues for this proposed device, such as device structure design, process optimization and memory array integration. Promising feasible applications and remaining technology issues to solve were also discussed.

Impact of interface controlling layer of Al2O3 for improving the retention behaviors of In–Ga–Zn oxide-based ferroelectric memory transistor

We characterized the nonvolatile memory thin-film transistors, which was composed of an amorphous indium-gallium-zinc oxide (α-IGZO) active channel and a ferroelectric poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)] gate insulator, and investigated the impact of an interface controlling layer. Excellent device performances, such as the field-effect mobility of 60.9 cm2 V−1 s−1, the subthreshold swing of 120 mV/dec, and the memory window of 6.4 V at ±12 V programming, were confirmed for the device without any interface layer. However, the memory retention time was very short. The retention behaviors could be dramatically improved when 4 nm thick Al2O3 layer was introduced between the P(VDF-TrFE) and α-IGZO.

Effect of ZnO channel thickness on the device behaviour of nonvolatile memory thin film transistors with double-layered gate insulators of Al2O3 and ferroelectric polymer

Poly(vinylidene fluoride trifluoroethylene) and ZnO were employed for nonvolatile memory thin film transistors as ferroelectric gate insulator and oxide semiconducting channel layers, respectively. It was proposed that the thickness of the ZnO layer be carefully controlled for realizing the lower programming voltage, because the serially connected capacitor by the formation of a fully depleted ZnO channel had a critical effect on the off programming voltage. The fabricated memory transistor with Al/P(VDF–TrFE) (80 nm)/Al2O3 (4 nm)/ZnO (5 nm) exhibits encouraging behaviour such as a memory window of 3.8 V at the gate voltage of −10 to 12 V, and 107 on/off ratio, and a gate leakage current of 10−11 A.

18.1: Invited Paper: Oxide TFT Driving Transparent AMOLED

We have fabricated 3.2″ QVGA transparent AMOLED by integrating photostable top gate IGZO TFT array and highly transparent OLED. The photostability of oxide TFT was investigated under constant gate bias and constant current CC stress to explore the possibility of OLED application. After 40 hours CC stress of 10 μA with halogen lamp illumination, the ΔVth was just − 0.22 V while that obtained under dark was + 0.1 V. with newly designed OLED cathode and transparent getter we increase OLED transmittance up to 80% with keeping resistance of cathode at 6 Ω;/□. Outdoor stability of OLED and oxide TFT make transparent AMOLED viable in the real market.

Oxide Semiconductor-Based Organic/Inorganic Hybrid Dual-Gate Nonvolatile Memory Thin-Film Transistor

An organic/inorganic hybrid dual-gate (DG) nonvolatile memory thin-film transistor (M-TFT) was proposed as a device with high potential for implementing large-area electronics on flexible and/or transparent substrates. The active channel and bottom and top gate insulators (GIs) of the M-TFT were composed of In-Ga-Zn-O, Al2O3, and poly(vinylidene fluoride-trifluoroethylene) [P(VDF-TrFE)], respectively. It was confirmed that the fabricated DG M-TFT showed excellent device characteristics, in which the obtained field-effect mobility, subthreshold swing, and on/off ratio were approximately 32.1 cm2 V-1 s-1, 0.13 V/dec, and 108, respectively. It was also successfully demonstrated that the DG configuration for the proposed M-TFT could effectively work for improving the device controllability by individually controlling the bias conditions of the top gate and bottom gate (BG). The turn-on voltage could be dynamically modulated and controlled when an appropriate fixed negative voltage was applied to the BG. The required duration of the programming pulse to obtain a memory margin of more than 10 could be reduced to 100 μs. These results correspond to the first demonstration of a hybrid-type DG M-TFT using a ferroelectric copolymer GI/oxide semiconducting active channel structure and demonstrate the feasibility of a promising memory device embeddable in a large-area electronic system.

Solution-Processed Zinc Indium Oxide Transparent Nonvolatile Memory Thin-Film Transistors with Polymeric Ferroelectric Gate Insulator

Solution-Processed Zinc Indium Oxide Transparent Nonvolatile Memory Thin-Film Transistors with Polymeric Ferroelectric Gate Insulator Sung-Min Yoon, Shin-Hyuk Yang, Soon-Won Jung, Chun-Won Byun, Sang-Hee Ko Park, Chi-Sun Hwang, and Hiroshi Ishiwara* Tokyo Institute of Technology, Yokohama 226-8502, Japan Convergence Components and Material Research Laboratory, Electronics and Telecommunications Research Institute, Daejeon 305-700, Korea

Transparent Oxide Thin-Film Transistors Composed of Al and Sn -doped Zinc Indium Oxide

We have fabricated the transparent bottom gate thin-film transistors (TFTs) using Al and Sn-doped zinc indium oxide (AT-ZIO) as an active layer. The AT-ZIO active layer was deposited by RF magnetron sputtering at room temperature, and the AT-ZIO TFT showed a field effect mobility of 15.6 cm²/Vs even before annealing. The mobility increased with increasing the In₂O₃ content and postannealing temperature up to 250^degC. The AT-ZIO TFT exhibited a field effect mobility of 30.2 cm²/Vs, a subthreshold swing of 0.17 V/dec, and an on/off current ratio of more than 10⁹ .