Chun-Yao Wang

Augmented Cell Performance of NO-Based Storage Dielectric by N

Owing to the delayed introduction of high-kappa storage dielectric for trench DRAM, a new technology to extend the existing NO storage dielectric becomes a prerequisite. For trench DRAM, the nitride film of NO-based storage dielectric has been proved to possess higher quality by proper treatment, which enables further reduction in nitride thickness and extension of scaling limit for the existing storage dielectric. A 164% leakage current improvement without sacrificing the cell capacitance can be achieved through this process, while keeping the outstanding reliability performance of less than 438 ppm failure rate after a ten-year operation. Most importantly, this new process can be fully integrated into incumbent furnace process, which means that no additional tool investment is required, and it is crucial for trench DRAM manufacturers to maintain their competitive advantage before the high-k material prevails at 65 nm technology node.

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Si nanocrystal with a high density of 5.1 X 10 11 cm -2 and an average size of 7.2 nm has been achieved on the NH 3 -nitrided tunnel oxide, and the density is higher than that formed on the untreated tunnel oxide by a factor of 3.2. The higher density obtained by this technique is attributed to the lower activation energy for the Si nanocrystal nucleation growth on the nitrogen-containing surface of the nitrided tunnel oxide. The memory device with such a high nanocrystal density demonstrates a 1.79 V threshold voltage shift by programming at 10 V for 10 ms and a negligible memory window degradation up to 10 6 program/erase cycles. The good charge storage capability is evidenced by an extrapolated 10 year memory window of 0.92 V at 150°C.

O-Treated Nitride Film for Trench DRAM

A newly developed storage dielectric was found to have exceptional competence to prolong the life span of existent NO-based dielectrics by adopting N 2 O wet oxidation and postoxidation treatment. Compared with the conventional NO dielectric, 12.6% cell capacitance enhancement can be achieved while keeping a comparable leakage current. The reliability performance is also qualified with less than 438 ppm failure rate after 10-years of operation. In addition to the distinguished electrical characteristics, the intriguing point is its process simplicity since the N 2 O-related process could be fully integrated into the current furnace process. Combining the promising properties, this economical technique would be favorable for dynamic random access memory (DRAM) manufacturers to control their chip cost in the increasingly competitive arena.

High-Density Silicon Nanocrystal Formed on Nitrided Tunnel Oxide for Nonvolatile Memory Application

A simplified and integrated technique has been proposed to form an oxide/nitride storage dielectric in a single-furnace process by low-pressure oxidation and nitride film deposition with an extra N2 O treatment for the trench dynamic random access memory (DRAM). Compared to the conventional nitride/oxide dielectric, this newly developed dielectric enjoys cell-capacitance-enhancement factor as high as 12.5% without degrading the leakage current and electron-trapping property. From the reliability test, the qualification for the DRAM application is also proven by the dielectric lifetime longer than 10-years. Most importantly, this technique can reduce the production cycle time without an additional equipment investment, which is essential in the cost-competitive DRAM arena

Improved Electrical Characteristics of NO -Based Storage Dielectric by N2O Wet Oxidation and Postoxidation Treatment for Trench DRAM

This paper is concerned with organic contamination from a partially fluorinated o-ring used in a furnace for a high-temperature process. The organic outgas was confirmed by Fourier transform infrared analysis of the furnace exhaust gas. Experiments from practical trench dynamic random access memory disclosed that outgassed organic contaminants from the nitride process would severely worsen the tunneling leakage current performance of the storage dielectric and lead to fatal yield loss even though the cell capacitance was almost uninfluenced. To eliminate this yield detractor requires several test runs prior to real production after installation of the partially fluorinated o-ring; otherwise, a fully fluorinated o-ring is needed. From a cost viewpoint, the latter is highly suggested.

Oxide-Nitride Storage Dielectric Formation in a Single-Furnace Process for Trench DRAM

The fluctuation in the minority carrier lifetime (MCLT) measurement is observed when monitoring the metal contamination for the furnace performing denuded zone formation, and the mechanism responsible for this phenomenon is examined in this paper. Among various possible causes, the oxygen precipitates are found to be the main contributor for this MCLT fluctuation because the amount of oxygen precipitates after denuded zone formation is strongly related to the initial oxygen concentration in the wafer and this makes the MCLT value liable to be affected even for tiny initial oxygen difference. A gate oxide recipe is suggested to be adopted for MCLT monitoring in furnace performing denuded zone formation to circumvent the problem. For the gate oxide recipe, not only is the monitoring result stable but it is feasible to produce MCLT test wafers with real products without sacrificing tool productivity.

Impact of Organic Contamination From Partially Fluorinated O-Ring in High-Temperature Nitride Process on DRAM Performance

A new approach to monitor the quality of an ultra-thin nitride film has been proposed. The nitride quality is monitored by observing the oxide thickness for the nitride film after wet oxidation since the resistance to oxidation strongly depends on its quality. To obtain a stable oxide thickness without interference from extrinsic factors for process monitoring, monitor wafers without dilute HF solution clean are suggested because the native-oxide containing surface is less sensitive to oxygen and therefore forms the nitride film with stable quality. In addition, the correlation between variable retention time (VRT) performance of a real dynamic random access memory (DRAM) product and oxide thickness from different nitride process temperatures can be successfully explained and this correlation can also be used to establish the appropriate oxide thickness range for process monitoring.

A Process for Inline Minority Carrier Lifetime Monitoring for the Furnace Performing Denuded Zone Formation

In this paper, we discuss the cell capacitor characteristics via wafer acceptance test (WAT) and reliability test for advanced trench capacitor. Combination of N2O reoxidation and NH3 nitridation processes can improve leakage current and maintain the same level of cell capacitance. This obvious improvement is contributed from extra nitrogen incorporation in reoxidation surface and more oxygen incorporation in nitride layer, which modify the film structure of storage dielectrics. Based on secondary ion mass spectrometer (SIMS) and Fourier transform infrared (FTIR) analysis, we propose the band model to clarify the influence of reoxidation and nitridation processes on cell trench capacitor