Cimang Lu

Enhancement of thermal stability and water resistance in yttrium-doped GeO2/Ge gate stack

We have systematically investigated the material and electrical properties of yttrium-doped GeO2 (Y-GeO2) on Germanium (Ge). A significant improvement of both thermal stability and water resistance were demonstrated by Y-GeO2/Ge stack, compared to that of pure GeO2/Ge stack. The excellent electrical properties of Y-GeO2/Ge stacks with low Dit were presented as well as enhancement of dielectric constant in Y-GeO2 layer, which is beneficial for further equivalent oxide thickness scaling of Ge gate stack. The improvement of thermal stability and water resistance are discussed both in terms of the Gibbs free energy lowering and network modification of Y-GeO2.

Oxygen potential engineering of interfacial layer for deep sub-nm EOT high-k gate stacks on Ge

The interfacial layer (IL) control is a key to achieving deep sub-nm EOT gate stacks with maintaining superior interface properties. We propose the thermodynamically robust IL engineering on Ge (Y₂O₃-doped GeO₂ IL). Based on the understanding of Y₂O₃-doped GeO₂ IL, we have demonstrated 0.47-nm-thick EOT on Ge, and the highest electron mobility at high-N_s in Ge n-MOSFETs with sub-nm-thick EOT.

Structural and thermodynamic consideration of metal oxide doped GeO2 for gate stack formation on germanium

A systematic investigation was carried out on the material and electrical properties of metal oxide doped germanium dioxide (M-GeO2) on Ge. We propose two criteria on the selection of desirable M-GeO2 for gate stack formation on Ge. First, metal oxides with larger cation radii show stronger ability in modifying GeO2 network, benefiting the thermal stability and water resistance in M-GeO2/Ge stacks. Second, metal oxides with a positive Gibbs free energy for germanidation are required for good interface properties of M-GeO2/Ge stacks in terms of preventing the Ge-M metallic bond formation. Aggressive equivalent oxide thickness scaling to 0.5 nm is also demonstrated based on these understandings.

Reconsideration of electron mobility in Ge n-MOSFETs from Ge substrate side — Atomically flat surface formation, layer-by-layer oxidation, and dissolved oxygen extraction

We clarified wafer-related origins for electron mobility degradation in Ge n-MOSFETs. High-Ns electron mobility was dramatically improved thanks to (i) atomically flat Ge surface formation, followed by (ii) layer-by-layer oxidation. (iii) Oxygen-related neutral impurities in Ge substrates could be another origin of the mobility reduction on Ge wafers. By successfully eliminating these scattering sources in Ge n-MOSFETs, we demonstrated intrinsically high electron mobility in a wide range of Ns.

Design and demonstration of reliability-aware Ge gate stacks with 0.5 nm EOT

This paper reports a novel material/process-based design for reliability-aware Ge gate stack for the first time. Initially good characteristics of Ge gate stacks do not necessarily guarantee the long-term device reliability. To overcome the big hurdle, we have investigated the stability of GeO2 network as well as the formation of new high-k. The very robust Ge gate stack with both 0.5 nm EOT and sufficiently low Dit is demonstrated.

Yttrium scandate thin film as alternative high-permittivity dielectric for germanium gate stack formation

We investigated yttrium scandate (YScO3) as an alternative high-permittivity (k) dielectric thin film for Ge gate stack formation. Significant enhancement of k-value is reported in YScO3 comparing to both of its binary compounds, Y2O3 and Sc2O3, without any cost of interface properties. It suggests a feasible approach to a design of promising high-k dielectrics for Ge gate stack, namely, the formation of high-k ternary oxide out of two medium-k binary oxides. Aggressive scaling of equivalent oxide thickness (EOT) with promising interface properties is presented by using YScO3 as high-k dielectric and yttrium-doped GeO2 (Y-GeO2) as interfacial layer, for a demonstration of high-k gate stack on Ge. In addition, we demonstrate Ge n-MOSFET performance showing the peak electron mobility over 1000 cm2/V s in sub-nm EOT region by YScO3/Y-GeO2/Ge gate stack.

Dramatic effects of hydrogen-induced out-diffusion of oxygen from Ge surface on junction leakage as well as electron mobility in n-channel Ge MOSFETs

This paper discusses about effects of oxygen in Ge substrate on MOSFET performance from both viewpoints of advantages and disadvantages. For improvement of electron mobility in Ge n-MOSFETs, oxygen in the channel region should be extracted to suppress additional scattering. On the other hand, oxygen in S/D region is helpful for dramatically reducing junction leakage currents. By understanding these oxygen effects on Ge, high electron mobility Ge n-MOSFETs with the highest Ion/Ioff ratio are demonstrated.

Structural coordination of rigidity with flexibility in gate dielectric films for sub-nm EOT Ge gate stack reliability

This paper reports a gate dielectric film design for reliability-aware as well as scalability conscious gate stacks on Ge. Initially good characteristics of Ge gate stacks do not necessarily guarantee the long-term device reliability. To overcome this big hurdle, we propose a novel concept of the rigidity control in the dielectric films with continuous random network. Ge gate stacks with initially prominent passivation and long term reliability are demonstrated experimentally. This is a new view for achieving the built-in design of gate dielectric film with reliability as well as scalability.

Reliability assessment of germanium gate stacks with promising initial characteristics

This work reports on the reliability assessment of germanium (Ge) gate stacks with promising initial electrical properties, with focus on trap generation under a constant electric stress field (Estress). Initial Ge gate stack properties do not necessarily mean highly robust reliability when it is considered that traps are newly generated under high Estress. A small amount of yttrium- or scandium oxide-doped GeO2 (Y-GeO2 or Sc-GeO2, respectively) significantly reduces trap generation in Ge gate stacks without deterioration of the interface. This is explained by the increase in the average coordination number (Nav) of the modified GeO2 network that results from the doping.

High electron mobility n-channel Ge MOSFETs with sub-nm EOT

Poor electron mobility in n-channel Ge FETs is not intrinsic. We can engineer the Ge interface through understanding of thermodynamics in gate stack formation and of kinetics of both surface planarization and oxidation. Thus, Ge FETs are quite promising not only in p-channel but also in n-channel FETs.