Clinton C. Chao

Precision flip-chip solder bump interconnects for optical packaging

Solder bump flip-chip technology is particularly well suited to the packaging of classes of devices, such as fine pitch light emitting diode (LED) array electrophotographic print heads, which place premiums on precision alignment, high electrical interconnect density, close die placement, and low cost. The manufacturing feasibility of such an array was investigated, with particular emphasis on the quality of surface tension induced self-alignment inherent in solder bump bonding. An array of surface emitting LED diode array chips was fabricated employing 75- mu m-diameter solder bumps on 156- mu m pitch. The chips were spaced 15 mu m edge-to-edge, face down, on a glass substrate patterned with thin-film metallization. Chip-to-substrate alignment errors in the X-Y plane were found to be under 1.5 mu m with a standard deviation of under 1.0 mu m, well below the 10-15- mu m error typical of the standard mechanical alignment method. Improvements in light output uniformity and a reduction in scattered light over arrays manufactured with conventional die placement and wire bonding were also observed. >

Multi-layer thin-film substrates for multi-chip packaging

It is commonly recognized that multiple chip module (MCM) packaging offers great advantages in system performance by virtue of the elimination of an entire level of interconnection. Multilayer thin-film module technologies for high-performance multiple chip packaging were developed and integrated. The technologies, which feature four copper layers, polyimide dielectric, controlled-impedance transmission lines, and solder bump assembly, were demonstrated on a variety of vehicles including, recently, a 4-kbyte RAM module operating at above 100-MHz clock frequency. The generic MCM substrate technology is described. The process can be designed to be compatible with a number of substrate materials as required for specific applications. >

Multilayer thin-film substrate for multichip packaging

Multilayer thin-film module technologies for high-performance multiple-chip module (MCM) packaging were developed and integrated. The technologies, which feature four copper layers, polyimide dielectric, controlled impedance-transmission lines, and solder-bump assembly, were demonstrated on a variety of vehicles including a 4K RAM module operating above 10-MHz clock frequency. The generic MCM substrate technology is described. The process can be designed to be compatible with a number of substrate materials.<<ETX>>

Multi-chip packaging for high performance systems

Multichip module (MCM) substrate, component assembly, and cooling technologies have been developed and demonstrated on several vehicles that include a 4-Kbyte RAM module operating at above 100-MHz clock frequency. An optimum MCM may consist of a set of composite layers of a multi-layer thin film polyimide structure over a multilayer ceramic substrate with a high pin density. The MCM technology provides system designers with increased circuit packing density and a larger number of accessible circuits, which results in lower machine-cycle time and cycles per instruction, leading to higher system performance. Moreover, the MCM technology opens up options for circuit organization and system architecture and for further improvements in system performance.<<ETX>>