Crystal Li
Dow Chemical Company
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Publication
Featured researches published by Crystal Li.
Circuit World | 2010
Crystal Li; Paul Ciccolo; Dennis Yee
Purpose – The purpose of this paper is to present an overview of the alternative testing approaches that may be used to assess interconnect quality and their application to laminate material and plated‐through‐hole (PTH) process control.Design/methodology/approach – The paper introduces the importance of inner‐layer copper reliability and how to evaluate it. It reviews and discusses the effects of all factors involved, including laminate material, panel design, and chemical controls, on interconnect defects (ICDs).Findings – The best possible reliability can only be achieved by implementation of process controls ranging from incoming laminate material inspection to drilling parameters and finally chemical controls within the electroless copper process.Research limitations/implications – This paper focuses on through‐hole multilayer reliability. Although blind via reliability shares some aspects with through‐hole reliability, there are other factors that only apply to blind vias. This area will be the subj...
international microsystems, packaging, assembly and circuits technology conference | 2012
Ming-Yao Yen; Ming-Hung Chiang; Hsu-Hsin Tai; Hsien-Chang Chen; Kwok-Wai Yee; Crystal Li; Mark Lefebvre; Martin W. Bayes
The combination of specialized equipment and new copper via fill chemistry offers end users a cost effective, highly capable and production proven process for IC package substrate microvias filling. A new, insoluble anode, DC microvia fill system is now available for high volume manufacturing (HVM), offering additional operating flexibility and end user preference.
international microsystems, packaging, assembly and circuits technology conference | 2008
Bryan Chueh; Cindy Wu; Crystal Li; Kazuo Tanabe
The increased functionality of todays advanced electronics, such as multi-function mobile equipment, is driven by semiconductor technology development. The added functionality of semiconductor and passive devices increase circuit density and decrease the available assembly space in the device. Packaging substrates are controlled by semiconductor trends. As semiconductor chip performance improves, the substrates and packaging technologies must keep pace. This paper discusses a unique Adhesion Promotion Process designed for the semi-additive fabrication of advanced flip-chip packaging substrates. In these applications, 2-D measurements, such as Ra (average roughness), have been the traditional parameters specified to control surface quality. In this article we will explore how 3D parameters can be employed to provide greater insight into surface finish and performance. In particular, we will focus on characterizing the effects of carrier films surface at each step of the adhesion promotion process, using 3-D surface profile parameters.
international microsystems, packaging, assembly and circuits technology conference | 2013
Ming-Yao Yen; Ming-Hung Chiang; Hsu-Hsin Tai; Hsien-Chang Chen; Kwok-Wai Yee; Crystal Li; Elie H. Najjar; Mark Lefebvre; Betty Xie
Electrolytic copper microvia filling is an enabling technology, prominently used in todays manufacture of high density interconnect (HDI) and packaging substrate applications for better reliability, increased circuit densification, design flexibility and thermal management. To meet these needs, seemingly incompatible objectives must be met. Thinner and more uniform surface copper deposits have to be produced; increasingly difficult microvia geometries must be filled, while maintaining plating rates capable of delivering production throughputs. This paper describes a new panel and pattern-plate, direct current (DC) copper electroplating process designed for packaging substrate and HDI applications. Microvia filling performance, surface distribution and product reliability as a function of a variety of physical processing variables is discussed.
international microsystems, packaging, assembly and circuits technology conference | 2016
Jian Zhang; Ivan Hsu; Crystal Li
Electroless Nickel Immersion Gold (ENIG) is one of the important final finish techniques that is used in the printed circuit board industry. Despite its relatively expensive cost compared to other final finishing processes such as OSP and immersion Tin etc., ENIG has many advantages. The low reactivity of Au can protect the underlying Ni and Cu surfaces from oxidation and keeps the board suitable for long storage time. It provides excellent surface planarity suitable for soldering, especially for tiny parts such as BGA and FlipChip, and the surface remains solderable even after multiple reflow cycles. It is useful for contact surfaces such as membrane switches and contact points and may also be used for wire bonding. The Immersion Gold (IG) bath provides the protective Au layer after the Electroless Ni (EN) process following the below equation: 2Au+ + Ni _ 2Au + Ni2+. As an electrochemical process, the deposition rate (or Au thickness per unit of time) is highly dependent on the redox potential of Au+ and electropotential of the Ni surface. The former can be considered as a fixed value in a Au plating solution while the latter will vary depending on the design of boards (pad size, connection of pad to the inner-layer Cu, etc.). The differences of surface potential, or so-called galvanic effect, makes the deposition of Au non-uniform, which may influence the properties of the board in many aspects. For example, chromatic aberration of the Au surface appears and some of the extremely thick Au pads may appear as red color; solderability may become uneven across all pads; and Au may be wasted due to the poor gold thickness distribution. More seriously, the galvanic effect may cause Au skip-plating, or black Ni because of Ni over-dissolution on specific pads, resulting in the solderability problem. Our new immersion gold technology can effectively reduce the galvanic effect by introducing a new chemical system. The electropotential differences were minimized among pads with various surface areas or connected to different inner-layer copper areas thus providing a uniform gold deposition. Meanwhile, the plated Au thickness can be steadily increased from less than 1 microinch to 3 microinches and metallic lustre of the Au surface remained normal, from the pale yellow of thinner Au to the lemon yellow of thicker Au. Ni corrosion resistance remained good for a range of Au thickness from 1 microinch to 3 microinches. Modified HNO3 porosity test yielded good results. Solderability test using SAC305 solder showed good reliability after 0×, 3× reflow and baking (150 oC, 4 hours) conditions in ball shear and ball pull test.
international microsystems, packaging, assembly and circuits technology conference | 2015
Feng Liu; Kristen M. Milum; Don Cleary; Maria Anna Rzeznik; Wenjia Zhou; Connie S. K. Kwong; Dennis Chit Yiu Chan; Vini S. W. Chum; Crystal Li; Dennis Yee; Jerry Chang; Katsuhiro Yoshida
This paper describes the development of a new ionic palladium catalyst, CIRCUPOSIT™6530 Catalyst, along with a tartrate-based horizontal electroless copper bath, CIRCUPOSIT™6550, to meet the performance demands of high-density-interconnect (HDI) and packaging (PKG) substrates in horizontal electroless copper plating. Implementation of the new ionic catalyst process is demonstrated through excellent coverage and reliability performance of through holes and microvias on HDI and PKG substrates following processing in horizontal equipment, as well as peel strength on low profile dielectric materials in the semi-additive process. Results also showed that the new CIRCUPOSIT™6530 Catalyst demonstrated stable performance during customer qualification.
international microsystems, packaging, assembly and circuits technology conference | 2015
Weigang Wu; Joyce Hung; Sally Lau; Erhang Zhang; Gary Hui; Crystal Li; Dennis Yee
Multilayer boards, which are widely used in professional electronics such as sever, communication, medical and military equipments, trend to increase layer counts (up to more than 56 layers) and aspect ratio (up to more than 25:1). Accordingly, it becomes more and more difficult to plate copper into the through holes with an acceptable deposit. To meet these demands, a new generation of high performances periodic pulse reverse (PPR) copper plating process has been developed. It is designed for use with soluble anodes and simple rectangle waveforms in vertical application. The new PPR chemistry demonstrates an excellent and stable throwing power up to a tested bath life of more than 200 AH/L. Neither a continuous carbon polish nor the frequent carbon treatment is required during operation. Meanwhile, it is easy to restart after idling with no need for a long dummy process. Effects of substrate, waveform on throwing power performance, the process capability to pattern and blind vias plating are also discussed in this article.
international microsystems, packaging, assembly and circuits technology conference | 2013
Andy Lok-Fung Chow; David Wu; Crystal Li; Dennis Yee
Glyoxylic acid (GA) has been reported to be a promising autocatalytic reducing agent in electroless copper for more than 26 years, which can eliminate the environmental hazards, health and safety concerns associated with formaldehyde. This paper will introduce a novel and environmental-friendly electroless copper process with GA and tartrate as autocatalytic reducing agent and chelatant respectively. It had comparable plating performance with those conventional formaldehyde baths and the decomposition of GA can be suppressed. This novel GA electroless copper bath can potentially be applied in both vertical and horizontal equipment.
Archive | 2010
Crystal Li; Dennis Yee; Michael Cy Tang
Archive | 2014
Andy Lok-Fung Chow; Dennis Yee; Crystal Li