Mark Lefebvre

Studies of microvia filling mechanism and a novel Cu plating formula

Microvia filling by copper electroplating has been a key process for fabrication of high density interconnection (HDI) of advanced PCBs or IC substrates. Currently, conventional copper plating formulas used for the microvia filling typically contain at least two or three components, such as suppressor, accelerator, and leveler. A specific synergy between these additives leads to a bottom-up deposition of copper in the microvia, so that the microvia can be fully filled by the copper deposit without a void [1-6]. However, copper is also deposited simultaneously on the board surface during plating, when the conventional copper plating formula is employed. Consequently, a pattern with fine lines formed by an etching process is not easily obtained due to the thick copper film plated on the board surface. Therefore, we have developed a novel copper plating formula herein in order to achieve microvia filling without an increase in copper thickness on the board surface after the copper electroplating. In other words, this novel copper plating formula can offer a highly selective filling for microvia metallization, that is, the whole copper was exclusively deposited in the microvia. A comparison of cross-sections of copper filled microvias using two different plating formulas, one conventional and the other novel, is shown in this work. A basic cyclic voltammetry (CV) analysis was carried out to explain the filling results. A simple mathematical simulation of current density distribution is also presented to explain the filling mechanism.

Next generation electroplating technology for high planarity, minimum surface deposition microvia filling

The combination of specialized equipment and new copper via fill chemistry offers end users a cost effective, highly capable and production proven process for IC package substrate microvias filling. A new, insoluble anode, DC microvia fill system is now available for high volume manufacturing (HVM), offering additional operating flexibility and end user preference.

Electroplating through holes with different geometry -- A novel and high productivity process for through hole fill plating

A novel DC through hole filling process was formulated for high volume HDI and substrate core layer metallization production. The process yields high quality results over a wide current density range.

Copper electroplating for HDI and IC substrate through hole fill

Established methods for filling through holes in core layers of HDI and IC substrates are labor intensive, multistep processes that rely on mechanical filling with epoxy or paste after conformal through hole metallization, planarization, and a cap layer of electrodeposited copper before subsequent build-up of additional dielectric layers. Additionally, the mechanical strength and thermal conductivity properties of current epoxy or paste materials used to fill through holes are sub-optimal. With recent advances in copper electroplating technology, it is now possible to completely fill through holes in build-up core layers with planar, void-free solid copper electrodeposits, while simultaneously improving mechanical and thermal properties. The use of a single copper electroplating process eliminates the separate filling, planarization and capping steps, shortening the circuit board manufacturing process. This paper describes a novel pattern-plate, Direct Current (DC) copper electroplating process designed for filling core layer through holes in HDI and IC substrates. Copper through hole fill performance for a variety of substrate thicknesses and hole diameters as a function of chemical parameters, processing variables and electroplating equipment design is discussed.

Enabling Low-Temperature Bonding in Advanced Packaging Using Electrodeposited Indium

As the advancement of transistor nodes faces unprecedented challenges and work continues to extend Moores law at the back end of the line (BEOL), packaging has become one of the fastest growing segments in the semiconductor industry. Lead-free soldering is one of the most critical steps in interconnection at the packaging level. The evolution of packaging requirements for various devices is driving changes in lead-free solder material selection, with lower melting point being an emerging criterion. Indium, because of its unique properties such as high thermal and electrical conductivity, excellent ductility, and particularly the low melting point of 157 °C along with the capability of alloying with other metals (e.g. tin) to bring the melting point further down, is drawing increasing attention to its application in packaging, as a candidate for low temperature solders. In the current study, indium capping on standard and micro copper pillars was demonstrated. It was also shown that stacking indium and tin layers could form (near) eutectic indium-tin alloys after reflow with a melting point as low as 119 °C. The experimental next-generation indium electroplating chemistry demonstrated a strong potential to further improve the performance, such as a smoother surface morphology compared to the current generation chemistry, towards demanding requirements for future packaging applications.

Next Generation Electroplating Process for HDI Microvia Filling and Through Hole Plating

As higher and higher pin-count semiconductor packages are deployed in telecommunications and data processing applications, Printed Circuit Board (PCB) substrates must evolve to allow increased routing densities. To be capable of meeting these routing density and complexity needs, higher layer counts must be combined with filled microvias. High Density Interconnect (HDI) product of this type places significant new demands on the metallization processes, in particular, copper electroplating. To meet these needs, seemingly incompatible objectives must be met. Thinner and more uniform surface copper deposits have to be produced, increasingly difficult microvia geometries must be filled, through-hole throwing power delivered, while maintaining plating rates capable of delivering production throughputs. These demands often exceed the capability of current commercial copper electroplating processes. This paper describes a new pattern-plate, Direct Current (DC) copper electroplating process designed for HDI and packaging substrate applications. Microvia filling performance, plated through hole throwing power, surface distribution / trace profile and product reliability data, as a function of a variety of processing variables is discussed.

Advanced thin copper electroplating process for HDI microvia filling application

Electrolytic copper microvia filling is an enabling technology, prominently used in todays manufacture of high density interconnect (HDI) and packaging substrate applications for better reliability, increased circuit densification, design flexibility and thermal management. To meet these needs, seemingly incompatible objectives must be met. Thinner and more uniform surface copper deposits have to be produced; increasingly difficult microvia geometries must be filled, while maintaining plating rates capable of delivering production throughputs. This paper describes a new panel and pattern-plate, direct current (DC) copper electroplating process designed for packaging substrate and HDI applications. Microvia filling performance, surface distribution and product reliability as a function of a variety of physical processing variables is discussed.

Electroplating apparatus and method considerations for high aspect-ratio through-hole copper electroplating process

As the electronic products become multi-functional and complicated, relatively high-density pattern must be designed to meet these requirements. As a result, multilayer printed circuit boards (PCBs) with high aspect ratio (AR>13) through hole metallization become the main trend in fabrication. That is, how to metalize the PCBs by Copper deposit with high throwing power and reliability becomes a major research. In this topic, a batch system of electroplating equipment designed for the use in the pilot line for acid Copper plating are discussed. It is included a comparison of distance between anodes, anode and cathode, different types of solution agitation, such as air, paddle, and cathode vibration. According to the study results, the throwing power for plate-through hole and microvia plating and deposition distribution could be improved by the adjustment of anode distance (anode/anode or anode/cathode), solution agitation (both air and paddle), and rock vibration, of cathode during plating.

Electroplating equipment design considerations for copper microvia filling

Electrolytic copper microvia filling is an enabling technology, prominently used in todays manufacture of advanced HDI and packaging substrate product. In the high volume mass production of copper filled microvias, a wide variety of electroplating equipment designs are available to the fabricator. In this article, various aspects of electroplating equipment design used in the mass production of copper filled microvias are discussed, including a comparison of continuous and batch systems, anode materials, solution delivery (convection), and copper replenishment. The impacts of these variables on microvia filling performance, plated through hole throwing power, surface distribution, trace profile and bath life are described.

Evaluation of High-Speed Copper Plating Products for RDL, Micropillar, and Fan-Out Applications

Increasing market demand for portable high-performance electronic devices is requiring an increase in the I/O density in the chip packaging used to make these products. Flip-chip interconnects that enable advanced packaging utilize a C4 bumping process with lead-free solder to make the chip interconnection. However, with the decreasing chip size and tighter I/O pitch requirements that are needed to realize high-performance, Cu pillar plating has emerged as an enabling technology to meet the technical demands. Cu pillars, capped with a lead-free solder, allow for increased I/O density while still maintaining the standoff needed for proper thermal and electrical performance of stacked chips. With this realized performance, there is expected to be a significant increase in capacity of Cu pillar in the industry, requiring electrolytic Cu plating products with fast deposition rates in order to decrease wafer plating time and increase throughput. In this paper, Cu electroplating products are evaluated for plati...