D. Arar

Numerical Investigation of the SiGe/Si Heterostructure Including Interfacial Defects for Photovoltaic Applications

To improve the electrical performance and reduce the fabrication cost of the solar cell, thin-film solar-cell concepts are widely explored. In this context, many studies have been carried out to study the impact of the thin thickness of the material on the solar cell behavior. Recently, the Si1-xGex/Si heterostructure is considered as attractive alternative for photovoltaic applications due to their band structures, which allow getting an additional gain in the device efficiency. However, the growth of this material is not totally controlled, and the presence of interfacial defects is more than estimated after a growth run of this material. Therefore, new experimental and numerical investigations which capture the Si1-xGex/Si heterostructure behavior should be developed in order to build a complete Si1-xGex/Si-based solar cell model for photovoltaic applications. In this paper, we aim at highlighting the immunity of the Si1-xGex/Si heterostructure against the defects degradation effect at nanoscale level (thin films). The effect of interface defect on the heterostructure has been carried out by extensive simulation using Atlas 3-D simulator, including the device dimension and the Ge Mole fraction effects.

Two-dimensional analytical threshold voltage model for nanoscale graded channel gate stack DG MOSFETs

Due to the advancement of the oxide and channel materials engineering, nanoscale graded channel gate stack (GCGAS) Double Gate (DG) MOSFET has been investigated and expected to suppress the short-channel effects and improve the subthreshold performances. So, in this paper a new two-dimensional analytical threshold voltage model is proposed to study and improve of the behavior of the nanoscale DG MOSFET in subthreshold domain for nanoelectronics applications. The developed approaches are verified and validated by the good agreement found with the numerical simulation.

Numerical investigation of a double-junction a:SiGe thin-film solar cell including the multi-trench region

We present a new approach based on the multi-trench technique to improve the electrical performances, which are the fill factor and the electrical efficiency. The key idea behind this approach is to introduce a new multi-trench region in the intrinsic layer, in order to modulate the total resistance of the solar cell. Based on 2-D numerical investigation and optimization of amorphous SiGe double-junction (a-Si:H/a-SiGe:H) thin film solar cells, in the present paper numerical models of electrical and optical parameters are developed to explain the impact of the multi-trench technique on the improvement of the double-junction solar cell electrical behavior for high performance photovoltaic applications. In this context, electrical characteristics of the proposed design are analyzed and compared with conventional amorphous silicon double-junction thin-film solar cells.

RADFET dosimeter design for environment monitoring applications

In this paper, a radiation sensitive FET (RADFET) dosimeter design (called the Dual-Dielectric Gate All Around DDGAA RADFET dosimeter) to improve the radiation sensitivity performance and its analytical analysis have been proposed for RADFET dosimeter-based applications (monitoring, robotics, medical sciences, ...). The proposed device has been implemented in SIMULINK tool to show the impact of the proposed dosimeter on the environment monitoring applications. The obtained results make the DDGAA RADFET dosimeter a promising candidate for environment monitoring applications.

A fast technique for gray level image thresholding and quantization based on the entropy maximization

Presented is a fast technique dedicated to the multilevel image thresholding and quantization based on the Shannonpsilas entropy maximization. The elaborated method uses efficiently the cumulative density function for the rapid determination of the optimal thresholds for segmentation. Some simulation results are reported for the aim of illustration and demonstration of its effectiveness.

An accurate organic solar cell parameters extraction approach based on the illuminated I-V characteristics for double diode modeling

In this paper, new electrical scheme modeling approach is proposed to extract the electrical parameters of the organic solar cells. These parameters such as shunt resistance, series resistance, saturation current, ideality factors, photo-current density and open-circuit voltage of the device have been ascertained using the Trust-Region Method (TR) for the double exponential solar cell model. We determine the seven solar cell parameters of the double diode circuit model using only the measured current-voltage data under illumination. The results of proposed approach demonstrate that it allows obtaining precise extracted parameters, which is confirmed by the good agreements between the fitted I-V curve and the experimental results. The proposed approach can be used to design the photovoltaic panels for an accurate solar power modeling.

An analytical subthreshold swing model to study the scalability limits of double-gate MOSFETs including bulk traps effects

in this work, a physics-based compact subthreshold swing (S) model including bulk traps effects is presented for undoped (or lightly doped) symmetric double-gate (DG) MOSFETs based on an analytical analysis of the two-dimensional (2D) Poisson equation in which the traps effects have been considered. Using this compact model, we have studied the effects of the defects on the scalability limits of DG MOSFETs. We have found that, the scaling capability of DG MOSFET will be improved as the silicon thickness of device is reduced. Compact, explicit expressions of a scale length including bulk trap states are derived, which expedite projections of scalability of DG MOSFETs and its requirement. The analytical results yield good agreement with numerical simulations confirming the model. Our study may provide a theoretical basis and physical insights for DG MOSFET design.

An analytical threshold voltage model for nanoscale GAA MOSFETs including effects of hot-carrier induced interface charges

As the channel length rapidly shrinks down to the nanoscale regime, a Gate All Around (GAA) MOSFET structure has been considered as a potential candidate for a CMOS device scaling due to its good short-channel-effects (SCEs) immunity. Therefore, in this work we present an analytical model including the hot-carrier induced interface charge effect for undoped GAA MOSFETs. We have studied the hot-carrier degradation effects on the surface potential and the threshold voltage of nanoscale GAA MOSFETs. Basing on this new device model, we found that the degradation becomes more important when the channel length gets shorter, and the minimum surface potential position is affected by the hot-carrier induced localized interface charge density. Our obtained results showed that the analytical model is in close agreement with the 2-D numerical simulation over a wide range of device parameters. The proposed analytical approach may provide a theoretical basis and physical insights for GAA MOSFET design including the hot-carrier degradation effects.

Numerical investigation of nanoscale SiGe DG MOSFET with graded doping channel for improving reliability behavior

The use of lower band gap materials such as SiGe for the DG MOSFET channel is of paramount importance given their compatibility with the process developed for pure Silicon devices. Furthermore, the increased electrons mobility in SiGe material has a positive effect on both drain current and transconductance. However, band gap narrowing due to Ge mole fraction increasing channel is a crucial obstacle that leads to electrical performance degradation. Thus, we present in this paper a novel graded doping channel-based approach to enhance the device reliability. Based on Atlas 2-D simulation of the nanoscale SiGe Double Gate MOSFET including the interface defects near the drain side, we develop numerical models to explain the impact of several doping profile on the immunity performance of the nanoscale transistor against the interface traps density. In this context, subthreshold characteristics of the proposed design (threshold voltage, swing factor and gate current) are investigated and evaluated with respect to the conventional uniform doping profile DG MOSFET characteristics.

ANFIS-based computation to study the nanoscale circuit including the hot-carrier and quantum confinement effects

In this paper, we present a new approach based on fuzzy logic for the modeling of the subthreshold swing factor by using the Adaptive Network Fuzzy Inference System (ANFIS). It is also assumed that the nanoscale Double Gate (DG) MOSFET device under study is subject to both hot-carrier and quantum effects. Afterward, an analytical expression is deduced for the transconductance parameter from the subthreshold swing fuzzy model. The developed framework is then adopted as a basis of studying the degradation mechanism of a single transistor amplifier. The obtained results show good agreement with the numerical simulations provided by ATLAS 2D-simulator. The proposed model presented in this paper offers a simple and accurate approach to study the nanoscale CMOS-based circuit behavior including the hot-carrier damage and quantum effects.