M.A. Abdi

Drain current model for undoped Gate Stack Double Gate (GSDG) MOSFETs including the hot-carrier degradation effects

In this paper, analytical models of drain current and small signal parameters for undoped symmetric Gate Stack Double Gate (GSDG) MOSFETs including the interfacial hot-carrier degradation effects are presented. The models are used to study the device behavior with the interfacial traps densities. The proposed model has been implemented in the SPICE circuit simulator and the capabilities of the model have been explored by circuit simulation example. The developed approaches are verified and validated by the good agreement found with the 2D numerical simulations for wide range of device parameters and bias conditions. GSDG MOSFET design and the accurate proposed model can alleviate the critical problem and further improve the immunity of hot-carrier effects of DG MOSFET-based circuits after hot-carrier damage.

Wavelet-based ECG signals compression using SPIHT technique and VKTP coder

In this paper, an efficient Electrocardiogram (ECG) signal compression method based on wavelet transform is presented. The proposed method combines the adapted SPIHT (Set Partitioning In Hierarchical Trees) method with VKTP (Vector K-Tree Partitioning) coder. The SPIHT method is based on the use of wavelet transform which is very well suited to locate the energy of the signal in fewer coefficients. Using the VKTP algorithm, to encode the generated bit stream of SPIHT algorithm, we achieve high compression performances. The tests of this lossy compression/ decompression technique are performed on many ECG records from Arrhythmia Database. The obtained results illustrate the capabilities of the proposed approach to improve the compression ratio while maintaining a good signal quality.

An accurate organic solar cell parameters extraction approach based on the illuminated I-V characteristics for double diode modeling

In this paper, new electrical scheme modeling approach is proposed to extract the electrical parameters of the organic solar cells. These parameters such as shunt resistance, series resistance, saturation current, ideality factors, photo-current density and open-circuit voltage of the device have been ascertained using the Trust-Region Method (TR) for the double exponential solar cell model. We determine the seven solar cell parameters of the double diode circuit model using only the measured current-voltage data under illumination. The results of proposed approach demonstrate that it allows obtaining precise extracted parameters, which is confirmed by the good agreements between the fitted I-V curve and the experimental results. The proposed approach can be used to design the photovoltaic panels for an accurate solar power modeling.

An analytical subthreshold swing model to study the scalability limits of double-gate MOSFETs including bulk traps effects

in this work, a physics-based compact subthreshold swing (S) model including bulk traps effects is presented for undoped (or lightly doped) symmetric double-gate (DG) MOSFETs based on an analytical analysis of the two-dimensional (2D) Poisson equation in which the traps effects have been considered. Using this compact model, we have studied the effects of the defects on the scalability limits of DG MOSFETs. We have found that, the scaling capability of DG MOSFET will be improved as the silicon thickness of device is reduced. Compact, explicit expressions of a scale length including bulk trap states are derived, which expedite projections of scalability of DG MOSFETs and its requirement. The analytical results yield good agreement with numerical simulations confirming the model. Our study may provide a theoretical basis and physical insights for DG MOSFET design.

An analytical drain current model for GS GAA MOSFET including interfacial traps

Its widely recognized that Gate-All-Around (GAA) MOSFETs are considered among the most probable choices to continue CMOS performance boost beyond the conventional scaling frontiers. Such device offers the best controllability of short-channel effects claimed to be the predominant factor limiting how far the downscaling can be achieved. However, the lack of analytic compact models for degraded drain current can easily be notified in literature. Therefore, in this work we investigate the immunity of GAA MOSFET against the hotcarrier-induced degradation effect after considering the step-function approximation for interface charge distribution. The importance of including a high-k layer into the device architecture is also studied; the damaged device model presented in this work provides a simple and accurate approach for simulating the circuit behavior after hot-carrier damage.

An analytical threshold voltage model for nanoscale GAA MOSFETs including effects of hot-carrier induced interface charges

As the channel length rapidly shrinks down to the nanoscale regime, a Gate All Around (GAA) MOSFET structure has been considered as a potential candidate for a CMOS device scaling due to its good short-channel-effects (SCEs) immunity. Therefore, in this work we present an analytical model including the hot-carrier induced interface charge effect for undoped GAA MOSFETs. We have studied the hot-carrier degradation effects on the surface potential and the threshold voltage of nanoscale GAA MOSFETs. Basing on this new device model, we found that the degradation becomes more important when the channel length gets shorter, and the minimum surface potential position is affected by the hot-carrier induced localized interface charge density. Our obtained results showed that the analytical model is in close agreement with the 2-D numerical simulation over a wide range of device parameters. The proposed analytical approach may provide a theoretical basis and physical insights for GAA MOSFET design including the hot-carrier degradation effects.

A compact analytical current model including traps effects for GS DG MOSFETs

Due to the excellent control of DG MOSFETs over the short channel effects, they have been considered as a leading candidate to extend the scaling limit of conventional bulk MOSFETs. However, the hot carrier injection into gate oxides remains a potential problem in reliability field hence altering the device lifetime. In the present paper, a comprehensive drain current model incorporating hot-carrier-induced degradation effect is developed, the derivation is carried out based on some assumptions regarding threshold voltage and mobility. Using obtained model, we have studied the utility of adding a high-k layer into the device structure for which an improvement is detected, the accuracy and efficiency make our analytic current-voltage model for DG MOSFETs suitable for circuit simulation programs.

An analytical threshold voltage model to study the scaling capability of deep submicron double-gate GaN-MESFETs

In this work, a deep submicron double-gate (DG) Gallium Nitride (GaN)-MESFET design and its 2-D threshold analytical model have been proposed and expected to suppress the short-channel-effects for deep submicron GaN-MESFET-based low power applications. The model predicts that the threshold voltage is greatly improved in comparison with the conventional Single-Gate GaN-MESFET. The developed approaches are verified and validated by the good agreement found with the 2D numerical simulations for wide range of device parameters and bias conditions. DG GaN-MESFET can alleviate the critical problem and further improve the immunity of short-channel-effects of GaN-MESFET-based circuits in the low power deep submicron devices.

A new PSO-based approach to study the nanoscale DG MOSFETs

The Double Gate (DG) MOSFET has been proposed as potential alternative to the conventional bulk CMOS structure for extended CMOS scalability beyond 30 nm partly due to its immunity to short channel effects. So, the objective of this work is to provide an accurate drain current model based on an automatic parameter extraction method with PSO (Particle Swarm Optimization) for Current-Voltage-based MOSFET models. Extracted parameter values reproduce I–V characteristics within 5% RMS error for wide range of gate lengths. It is shown that the I–V characteristics predicted by our analytical model are in close agreement with 2-D numerical simulation results.

An optimized analytical electron mobility model based on genetic algorithm computation to study the GaN-based MOSFETs

Recently, the evolutionary techniques, like genetic algorithms (GA), has attracted considerable attention among various heuristic optimization techniques. So, in this paper, a genetic algorithm is implemented to study and model the electron mobility in wurtzite Gallium Nitride-based devices. Further, our obtained results are tested and compared with numerical data where a good agreement has been found for wide range of temperature, doping and applied high electric field. The optimized analytical models have been incorporated into the devices simulators to study the GaN-based MOSFETs for optoelectronics and high frequencies applications.