D. Kalavrouziotis

0.48Tb/s (12x40Gb/s) WDM transmission and high-quality thermo-optic switching in dielectric loaded plasmonics

We demonstrate Wavelength Division Multiplexed (WDM)-enabled transmission of 480Gb/s aggregate data traffic (12x40Gb/s) as well as high-quality 1x2 thermo-optic tuning in Dielectric-Loaded Surface Plasmon Polariton Waveguides (DLSPPWs). The WDM transmission characteristics have been verified through BER measurements by exploiting the heterointegration of a 60 μm-long straight DLSPPW on a Silicon-on-Insulator waveguide platform, showing error-free performance for six out of the twelve channels. High-quality thermo-optic tuning has been achieved by utilizing Cycloaliphatic-Acrylate-Polymer as an efficient thermo-optic polymer loading employed in a dual-resonator DLSPPW switching structure, yielding a 9 nm wavelength shift and extinction ratio values higher than 10 dB at both output ports when heated to 90°C.

Multi-format all-optical processing based on a large-scale, hybridly integrated photonic circuit

We investigate through numerical studies and experiments the performance of a large scale, silica-on-silicon photonic integrated circuit for multi-format regeneration and wavelength-conversion. The circuit encompasses a monolithically integrated array of four SOAs inside two parallel Mach-Zehnder structures, four delay interferometers and a large number of silica waveguides and couplers. Exploiting phase-incoherent techniques, the circuit is capable of processing OOK signals at variable bit rates, DPSK signals at 22 or 44 Gb/s and DQPSK signals at 44 Gbaud. Simulation studies reveal the wavelength-conversion potential of the circuit with enhanced regenerative capabilities for OOK and DPSK modulation formats and acceptable quality degradation for DQPSK format. Regeneration of 22 Gb/s OOK signals with amplified spontaneous emission (ASE) noise and DPSK data signals degraded with amplitude, phase and ASE noise is experimentally validated demonstrating a power penalty improvement up to 1.5 dB.

Fabrication and experimental demonstration of the first 160 Gb/s hybrid silicon-on-insulator integrated all-optical wavelength converter

We present a hybrid integrated photonic circuit on a silicon-on-insulator substrate that performs ultra high-speed all-optical wavelength conversion. The chip incorporates a 1.25 mm non-linear SOA mounted on the SOI board using gold-tin bumps as small as 14 μm. Τhe device performs chirp filtering and signal polarity inversion with two multi-mode interference (MMI) - based cascaded delay interferometers (DIs) monolithically integrated on the same SOI substrate. Full free spectral range (FSR) tuning of the DIs is accomplished by two independently tuneable on-chip thermal heaters. We demonstrate 160Gb/s all-optical wavelength conversion with power penalties of less than 4.6dB.

Tb/s switching fabrics for optical interconnects using heterointegration of plasmonics and silicon photonics: The FP7 PLATON approach

We present recent work that is carried out within the FP7 project PLATON on novel Tb/s switch fabric architectures and technologies for optical interconnect applications, employing heterointegration of plasmonics, silicon photonics and electronics.

A hybrid photonic integrated wavelength converter on a silicon-on-insulator substrate

We present fabrication and testing of a wavelength converter integrated on a silicon-on-insulator substrate. The chip employs a hybrid integrated SOA and delay-interferometers integrated on 4μm SOI. We demonstrate 40Gb/s error-free performance.

Agile photonic integrated systems-on-chip enabling WDM terabit networks

The ICT-APACHE research project is focusing on the development of cost-effective, compact, scalable and agile integrated components capable of generating, regenerating and receiving multi-level encoded data signals for high capacity (>100 Gb/s) WDM optical networks. APACHE technology relies on InP active, monolithic chips, hybridly integrated on silica-on-silicon planar lightwave platforms in order to achieve cost-efficiency, high yield, low power consumption and device scaling beyond the level commercially available today. The APACHE integration approach is implemented in a two-dimensional plan, horizontally and vertically, in order to enable multi-functionality and increased capacity, respectively. The final goal of the APACHE project is the fabrication of integrated arrays of transmitters, receivers and regenerators that will operate with 100 Gb/s OOK, DPSK and DQPSK modulated signals, allowing for 1 Terabit/s on-chip capacity. In this paper, we will review the latest results from the system-level characterization of the developed components and will outline the roadmap for future endeavours.

Cost-effective single-etched TM-mode SOI grating couplers for broadband perfectly vertical coupling

In this paper we present a uniform fully-etched TM-mode grating coupler for vertical coupling of light into SOI photonic integrated circuits and a chirped alternative to increase its bandwidth by using the same fabrication steps and maintaining its coupling efficiency. The first design refers to a uniform grating consisting of 22 periods with 670 nm period length, exhibiting 5.6 dB coupling losses at 1564 nm and a 3dB bandwidth of 32 nm. The 3dB bandwidth is extended from 32 to 76 nm by adding a chirped section at the front end of the uniform section in the second design. The ultra-wideband coupler can be used across all C-band as well as in S and L bands, it is realized at no expense of fabrication complexity while coupling efficiency is maintained. The coupling efficiency can be improved if the grating gap is decreased below 80 nm yet increasing fabrication resolution requirements. Theoretical and experimental analysis is presented for the coupling efficiency versus structure period and gap width while angle alignment tolerance is also investigated.

Deterministic Timing Jitter Analysis of SOA-Amplified Intensity-Modulated Optical Pulses

We demonstrate a detailed theoretical and experimental analysis of the deterministic timing jitter induced on intensity-modulated optical pulse streams when propagating through a SOA. The mathematical analysis reveals an approximate linear relationship between jitter and pulse intensity modulation when the SOA gain recovery time is shorter than the pulse period. The theoretical results have been confirmed by experimental deterministic timing jitter measurements for intensity modulation levels up to 8 dB, showing good agreement between theory and experiment.

16×1 dual polarization SOI MUX/DEMUX for flexible-grid optical networks

We demonstrate a bandwidth selective and wavelength flexible 16×1 MUX/DEMUX device with on-chip polarization multiplexing functionality. Experimental demonstration on data traffic conditions revealed excellent performance for operation in Flex-Grid application scenarios.

1550 nm VCSEL-based 0.48 Tb/s transmission scheme employing PAM-4 and WDM for active optical cables

With this paper we investigate the system-level performance of VCSELs, parameterized with true experimental LI-VI data and dynamic characteristics of state-of-the-art VCSELs with 3 dB modulation bandwidth at 15 GHz, and propose their deployment as high-speed multi-level optical sources in a mid-range active optical cable (AOC) model for performance prediction of a rack-to-rack interconnection. The AOC architecture combines a 6-element 1550 nm VCSEL array, each directly modulated with 40 Gbaud PAM-4 data, with a wavelength division multiplexer (WDM), in order to implement a parallel link with aggregate traffic of 0.48 Tb/s. Transmission reach exceeded 300 m by deploying a two-tap feed forward equalizer filter at the electrical VCSEL driver. Bit Error Rate (BER) measurements and analysis were carried out in MATLAB. In practice, the thermal behavior and basic operational characteristics of the VCSELs fabricated by the Technische Universität München (TUM) were used to study the thermal performance and operational range of the complete AOC model. The VCSELs were initially operated at 20°C and BER measurements showed power penalties of 1.7 dB and 3.5 dB at 300 m and 500 m of transmission distance respectively for all 6 data channels. System performance was also investigated for elevated operating temperatures of the VCSEL module and the additional system degradation and BER penalties introduced by operation at 50°C and 65°C were also investigated for transmission distances of 300 m and 500 m.