D. L. Kwong

Regenerative oscillation and four-wave mixing in graphene optoelectronics

We demonstrate the exceptionally-high third-order nonlinearity of integrated mono-layer graphene-silicon hybrid optoelectronics, enabling ultralow power resonant optical bistability, self-induced regenerative oscillations, and coherent four-wave mixing, all at few femto-joule cavity recirculating energies.

Energy gap and band alignment for (HfO2)x(Al2O3)1−x on (100) Si

High-resolution x-ray photoelectron spectroscopy (XPS) was applied to characterize the electronic structures for a series of high-k materials (HfO2)x(Al2O3)1−x grown on (100) Si substrate with different HfO2 mole fraction x. Al 2p, Hf 4f, O 1s core levels spectra, valence band spectra, and O 1s energy loss all show continuous changes with x in (HfO2)x(Al2O3)1−x. These data are used to estimate the energy gap (Eg) for (HfO2)x(Al2O3)1−x, the valence band offset (ΔEν) and the conduction band offset (ΔEc) between (HfO2)x(Al2O3)1−x and the (100) Si substrate. Our XPS results demonstrate that the values of Eg, ΔEν, and ΔEc for (HfO2)x(Al2O3)1−x change linearly with x.

Thermal stability of ultrathin ZrO2 films prepared by chemical vapor deposition on Si(100)

As a function of thermal treatment, the chemical stability of ultrathin ZrO2 films prepared by chemical vapor deposition on a silicon substrate is investigated by x-ray photoelectron spectroscopy. The chemical structure is stable up to 800 °C in both vacuum and N2 ambient, but a reaction forming zirconium silicide occurs above 900 °C in vacuum. The formation of silicide is accounted for by a reaction mechanism involving a reaction of ZrO2 with SiO, the latter formed above 900 °C at the interface between Si(100) and the thin layer of SiO2 formed during growth of the ZrO2.

Silicon Modulators and Germanium Photodetectors on SOI: Monolithic Integration, Compatibility, and Performance Optimization

Si modulators and Ge photodetectors are monolithically integrated on Si-on-insulator. The carrier-depletion-type Si modulators achieved high modulation efficiency and speed (<i>V</i> _¿ <i>L</i> _¿ = 2.56 V·cm, 10 Gb/s). Low-voltage operation (<i>V</i> _RF = 1 <i>V</i> _pp) was also demonstrated. Introducing a low-thermal-budget postepitaxy anneal improves the performance of the Ge photodetectors, thus resulting in significantly improved dark current. The responsivity and speed in the low-voltage regime are also enhanced, which enhances low-voltage or even short-circuit (<i>V</i> _Bias = 0 V) operation.

Electrical characteristics of ultrathin oxynitride gate dielectric prepared by rapid thermal oxidation of Si in N2O

This letter presents a unique process to grow high quality ultrathin (∼60 A) gate dielectrics using N2O (nitrous oxide) gas. Compared with conventional rapid thermally grown oxide in the O2, the new oxynitride dielectrics show very large charge‐to‐breakdown (at +50 mA/cm2, 850 C/cm2 for oxynitride compared to 95 C/cm2 for the control thermal oxide) and less charge trapping under constant current stress. Significantly reduced interface state generation was also observed under constant current stress and x‐ray radiation. A secondary‐ion mass spectroscopy depth profile indicates a nitrogen‐rich layer at the Si/SiO2 interface, which can explain the improved integrity of oxynitride dielectric.

Bistable resistance switching of poly(N-vinylcarbazole) films for nonvolatile memory applications

Poly(N-vinylcarbazole) (PVK) has been fabricated by spin-coating to show the bistable resistance switching characteristics. Various resistance states can be made by controlling the on-state current through the PVK films. The resistance of the on-state PVK films also affects the turn-off current, which needs to erase the on state. The filament theory is used to elucidate the observed phenomenon. We demonstrate that the PVK films exhibit good retention and stable “read-write-read-erase” cyclic switching characteristics. The PVK films also show a good switching behavior with on-off ratio of 104, which will be a potential material for nonvolatile memory application.

Effect of surface NH3 anneal on the physical and electrical properties of HfO2 films on Ge substrate

Metal-oxide-semiconductor capacitors were fabricated on germanium substrates by using metalorganic-chemical-vapor-deposited HfO2 as the dielectric and TaN as the metal gate electrode. It is demonstrated that a surface annealing step in NH3 ambient before the HfO2 deposition could result in significant improvement in both gate leakage current and the equivalent oxide thickness (EOT). It was possible to achieve a capacitor with an EOT of 10.5 A and a leakage current of 5.02×10−5 A/cm2 at 1 V gate bias. X-ray photoelectron spectroscopy analysis indicates the formation of GeON during surface NH3 anneal. The presence of Ge was also detected within the HfO2 films. This may be due to Ge diffusion at the high temperature (∼400 °C) used in the chemical-vapor deposition process.

Metal nanocrystal memory with high-/spl kappa/ tunneling barrier for improved data retention

A nonvolatile memory (NVM) with metal nanocrystal (NC) embedded in high-/spl kappa/ dielectrics is proposed. With the larger work function of the metal NC compared to that of silicon NC, the metal NC memory exhibits the better data retention characteristic. The theoretical analysis showing the effect of the electron barrier height on tunneling current density is also presented to support the importance of work function engineering of the NC in NVM structure. The other electrical characteristics such as the programming transient and data endurance are also studied and described in this paper.

Theoretical and experimental investigation of Si nanocrystal memory device with HfO/sub 2/ high-k tunneling dielectric

This paper describes improved memory characteristics of the Si nanocrystal memory devices by replacing the traditional SiO/sub 2/ with HfO/sub 2/ high-k dielectrics for the first time. Thanks to the combination of a lower electron barrier height and a larger physical thickness of HfO/sub 2/ as compared with SiO/sub 2/, the fabricated device shows excellent programming efficiency and data retention characteristic. The single-electron charging effect is clearly observed at room temperature. It also shows superior data endurance up to 10/sup 6/ write/erase cycles.

Ultra-Narrow Silicon Nanowire Gate-All-Around CMOS Devices: Impact of Diameter, Channel-Orientation and Low Temperature on Device Performance

Fully CMOS compatible silicon-nanowire (SiNW) gate-all-around (GAA) n- and p-MOS transistors are fabricated with nanowire channel in different crystal orientations and characterized at various temperatures down to 5K. SiNW width is controlled in 1 nm steps and varied from 3 to 6 nm. Devices show high drive current (2.4 mA/mum for n-FET, 1.3 mA/mum for p-FET), excellent gate control, and reduced sensitivity to temperature. Strong evidences of carrier confinement are noticed in term of Id-Vg oscillations and shift in threshold voltage with SiNW diameter. Orientation impact has been investigated as well