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Dive into the research topics where D. Resnik is active.

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Featured researches published by D. Resnik.


Journal of Micromechanics and Microengineering | 2005

The role of Triton surfactant in anisotropic etching of {1?1?0} reflective planes on (1?0?0) silicon

D. Resnik; D. Vrtacnik; Uros Aljancic; M. Mozek; S. Amon

Etching characteristics and properties of {1 1 0} silicon crystal planes used as 45° optical mirrors for deflecting optical beams from/to optical fibers were investigated. Fiber aligning grooves and passive mirror-like planes were realized by wet micromachining of (1 0 0) silicon in KOH–IPA and TMAH–IPA systems. Implementation of Triton-x-100 surfactant as an additive to 25% TMAH in anisotropic etching of {1 1 0} silicon passive mirror planes is reported and discussed. It was found that Triton-x-100 contents in the range of 10–200 ppm to the 25% TMAH–water etchant significantly increase the anisotropy mostly by decreasing the {1 1 0} etch rate and retaining the {1 0 0} etch rate. It is also shown that {1 1 0} surface roughness is substantially improved compared to two other etching systems. Furthermore, efficient convex corner underetching reduction is demonstrated. The results of optical characterization of passive mirrors with 632 nm incident light show reduced scattering of reflected optical beam due to improved microroughness for mirrors made by TMAH–Triton. For the reflection of the optical beam with 1.33 µm and 1.54 µm wavelengths, sputtered layer of gold is used as reflective coating on silicon mirrors thus increasing the reflected optical beam intensity by an additional 8%.


Journal of Micromechanics and Microengineering | 2011

Experimental study of heat-treated thin film Ti/Pt heater and temperature sensor properties on a Si microfluidic platform

D. Resnik; D. Vrtacnik; Matej Možek; Borut Pečar; S. Amon

Design, fabrication and characterization of thin film Ti/Pt heaters and integrated temperature sensors on a Si microfluidic platform are presented. Ti/Pt heaters and sensors provide controlled heating of microchannels realized on the opposite side of the Si platform. Ti/Pt heaters and sensors were fabricated simultaneously by a dc sputtering method and a lift-off process. Thermal annealing of deposited Ti/Pt layers in the temperature range of 300?700 ?C was investigated revealing a strong impact on the Ti/Pt resistivity and, consequently, on the final resistance of fabricated heaters and sensors. Furthermore, it was determined that the temperature coefficient of resistance (TCR) for Ti/Pt temperature sensors and the heater increased with the annealing temperature. Microstructural analysis of deposited and annealed Ti/Pt layers carried out by AES and AFM revealed that recrystallization followed by a grain growth process of heat-treated Ti/Pt layers started at around 500 ?C and correlated well with the behavior of electrical properties, but not with the TCR behavior of annealed layers. To reduce the heat losses of the heated Si platform, the heater and temperature sensors were covered hermetically by anodically bonded Pyrex glass with a prefabricated insulating cavity. According to this approach the power consumption was reduced by more than 25% due to the improved thermal insulation. Additional insulation steps implemented during thermal characterization of the assembled microfluidic platform further reduced the power consumption, but also increased the time response of the microfluidic reactor.


Microelectronics Journal | 2003

Different aspect ratio pyramidal tips obtained by wet etching of (100) and (111) silicon

D. Resnik; D. Vrtacnik; Uros Aljancic; M. Mozek; S. Amon

Different approaches to obtain sharp silicon tips with a variety of aspect ratios, for potential use in advanced microelectronics applications, were studied. Tips suited for atomic force microscopy and field emission arrays were formed by wet chemical etching of (100) and (111) single crystal silicon in KOH, TMAH and HNA etchant. Apex sharpening with thermal oxidising step resulted in tips with apex radius below 20 nm as evaluated by SEM analysis. The fabrication of silicon tips with isotropic etching on either (100) or (111) silicon confirmed that uniformity across the wafer and tip sharpness are lower with respect to anisotropically etched structures. Pyramidal tips with aspect ratios between 0.5 and 1.2 were obtained by these methods.


Journal of Micromechanics and Microengineering | 2000

Morphological study of {311} crystal planes anisotropically etched in (100) silicon: role of etchants and etching parameters

D. Resnik; D. Vrtacnik; S. Amon

Investigation was focused on the formation of {311} planes by wet anisotropic etching of (100) silicon and, in particular, on the characterization by means of surface roughness, etch rates and related convex and concave corner dynamic behaviour during maskless etching. KOH and TMAH water solutions were tested for their influence on previously mentioned parameters as well as the effect of isopropyl alcohol (IPA). It was found that convex corner undercutting is significantly reduced if {311} bounding planes are utilized instead of {111} bounding planes. For shallow structures a self-compensation can be obtained with KOH and when certain conditions are met, also with TMAH. The rounding of the concave corner that arises through prolonged etching is reported, which is particularly emphasized in KOH and less in TMAH etchant. Addition of IPA in maskless mode is experimentally investigated, showing minor influence on etching conditions and on reducing the undercut of convex corners. Etch rates and dimensional control of some microstructures are discussed and presented comparatively for different etching systems in a temperature range of 50-100 °C. By evaluation of surface quality with a surface profiler and SEM, it was found that the smoothest surface was achieved by etching in TMAH. The role of solution temperature in surface roughness was found to be of minor importance, as well as the stirring of the solution. It was determined that the IPA additive increases roughness when used with KOH, while with TMAH, the influence on roughness of the {311} planes is insignificant.


Sensors and Actuators A-physical | 2000

Study of low-temperature direct bonding of (111) and (100) silicon wafers under various ambient and surface conditions

D. Resnik; D. Vrtacnik; Uros Aljancic; S. Amon

Wafer bonding of commercially available (100) and (111) silicon wafers was performed in the range of temperatures from 80°C to 400°C in nitrogen, oxygen and low-vacuum atmosphere. Surface preparation with modified RCA cleaning method and hot nitric acid provided extremely clean and hydrophilic surfaces that were later brought into intimate contact. Various combinations of surface terminations such as thin chemical native silicon dioxide and thick thermal silicon dioxide on (111)- and (100)-oriented silicon wafers were prepared and investigated. Bonding quality evaluated by the tensile strength measurements showed the highest values obtained for strengthening in nitrogen atmosphere, reaching 12 MPa. Correlation between prebonding treatment, initial surface roughness and microroughness was made revealing the influence on the bonding energy. Interface imperfections of bonded samples were investigated by infrared transmission imaging revealing bubbles at the bonded interface only in case when bonding was performed in oxygen ambient. Thickness of the chemical native oxide after surface preparation step necessary for good bonding was found to be at least 0.8 nm. Wafers in the (111) orientation exhibited higher bonding abilities compared to (100) in case of bonding wafers with native oxides. This is believed to be due to higher density of available bonding sites as a consequence of enhanced chemical oxide growth rate and its homogeneity on (111) surface. Moreover, it is believed that due to higher positive charge of oxides grown on (111)-oriented silicon compared to (100), desorption of interfacial water is accelerated thus increasing the bonding energy at lower temperature. In conclusion, the best bonding results were obtained by bonding wafers with thick thermal oxide to (111) wafers with native oxide and annealed in nitrogen ambient.


Journal of Micromechanics and Microengineering | 2003

Effective roughness reduction of {100} and {311} planes in anisotropic etching of {100} silicon in 5% TMAH

D. Resnik; D. Vrtacnik; Uros Aljancic; S. Amon

We have performed an investigation to study the nature of surface roughness on {100} and {311} planes obtained by wet anisotropic etching of {100} silicon in 5% tetramethyl ammoniumhydroxide (TMAH) etchant. The surface roughness, which is in most cases a consequence of hillock formation at low concentrations of TMAH, was studied as a function of etch temperature, re-etch time, stirring conditions and the addition of small amounts of ammonium peroxodisulfate (AP). A short re-etching step performed in 25% TMAH or 5% TMAH+AP was found to decrease the total roughness obtained after the prolonged etching in 5% TMAH. We have found that smooth {311} planes without hillocks can be obtained by etching in 5% TMAH with the addition of only 0.25% of AP. Due to the decomposition of AP in the etching process as determined by increased surface roughness, a replenishing of the additive is proposed. Experimental results have shown an increased surface roughness and reduced etch rates of the {100} and {311} planes by increasing the agitation of the 5% TMAH etch solution.


mediterranean electrotechnical conference | 2002

Temperature effects modeling in silicon piezoresistive pressure sensor

Uros Aljancic; D. Resnik; D. Vrtacnik; M. Mozek; S. Amon

Temperature effects and compensation for temperature drift of offset voltage in silicon piezoresistive pressure sensors were analyzed. The derived equations take into account temperature dependences, the piezoresistive effect and thermal expansion of the diaphragm inducing additional stresses. Measurements performed on fabricated sensors confirm the importance of diaphragm induced thermal stress. Accordingly, a computer program enabling fast calculation of sensor sensitivity and offset voltage was conceived. Based on the analysis, an approach to compensation for temperature drift of offset voltage is proposed and confirmed with experimental results.


Microelectronic Engineering | 2000

Wet etching of silicon structures bounded by (311) sidewalls

D. Resnik; D. Vrtacnik; Uros Aljancic; S. Amon

Abstract Wet chemical etching of narrow recessed ridges and bossed structures on (100) silicon is presented with emphasis on convex and concave corner dynamic behaviour during maskless etching. Ridge and boss sidewalls that arise from the new masking technique are (311) crystal planes and offer a new dimension in wet micromachining. It was found that convex corner undercutting is significantly reduced if (311) planes are utilised instead of (111) bounding planes. Rounding of concave corners that arise through prolonged etching is reported which is particularly emphasised in KOH and less in TMAH etchant. Addition of IPA is experimentally investigated showing minor influence on etching conditions and on reducing the maskless undercut of convex corners. Etch rates and dimensional control of some microstructures are discussed and presented comparatively for both etching systems in a temperature range from 70 to 100°C.


mediterranean electrotechnical conference | 2002

Calibration and error correction algorithms for smart pressure sensors

M. Mozek; D. Vrtacnik; D. Resnik; Uros Aljancic; M. Cvar; S. Amon

The essential properties of smart sensor error correction algorithms and calibration procedures according to the IEEE1451.2 standard are presented. Using a modern microcontroller design, it is possible to implement STIM in a single chip design, but due to complexity of error correction and calibration algorithms it is preferable to distribute these tasks between several processors available in a network. A description of a simple calibration algorithm intended for implementation in modular STIM (smart transducer interface module) design is given. Other calibration and error correction approaches were tested on designed and fabricated smart sensor networks. Their implementation is discussed and the results of the most promising bivariate spline approximation algorithm are presented.


Sensors and Actuators A-physical | 2000

Side-illuminated 100 μm pitch X-ray detector for digital radiology

D. Vrtacnik; D. Krizaj; T Mali; D. Resnik; Uros Aljancic; S. Amon

A side-illuminated silicon X-ray strip detector for digital radiology with 100 μm pitch was designed, fabricated and characterized. In order to reduce noise and improve resolution of the detector, design and processing was optimized for low leakage currents, high dynamic resistance of biasing resistors, reduced strip pitch and wafer thickness. Operation of the field oxide field effect transistor (FOXFET) structure was analyzed by a 2D numerical device simulator and compared to experimental results. Measured results reveal that the detector is suitable for application in X-ray detection systems.

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D. Vrtacnik

University of Ljubljana

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S. Amon

University of Ljubljana

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M. Mozek

University of Ljubljana

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Borut Pečar

University of Ljubljana

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Matej Možek

University of Ljubljana

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D. Krizaj

University of Ljubljana

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Tine Dolžan

University of Ljubljana

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Samo Penič

University of Ljubljana

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