Uros Aljancic

The role of Triton surfactant in anisotropic etching of {1?1?0} reflective planes on (1?0?0) silicon

Etching characteristics and properties of {1 1 0} silicon crystal planes used as 45° optical mirrors for deflecting optical beams from/to optical fibers were investigated. Fiber aligning grooves and passive mirror-like planes were realized by wet micromachining of (1 0 0) silicon in KOH–IPA and TMAH–IPA systems. Implementation of Triton-x-100 surfactant as an additive to 25% TMAH in anisotropic etching of {1 1 0} silicon passive mirror planes is reported and discussed. It was found that Triton-x-100 contents in the range of 10–200 ppm to the 25% TMAH–water etchant significantly increase the anisotropy mostly by decreasing the {1 1 0} etch rate and retaining the {1 0 0} etch rate. It is also shown that {1 1 0} surface roughness is substantially improved compared to two other etching systems. Furthermore, efficient convex corner underetching reduction is demonstrated. The results of optical characterization of passive mirrors with 632 nm incident light show reduced scattering of reflected optical beam due to improved microroughness for mirrors made by TMAH–Triton. For the reflection of the optical beam with 1.33 µm and 1.54 µm wavelengths, sputtered layer of gold is used as reflective coating on silicon mirrors thus increasing the reflected optical beam intensity by an additional 8%.

Different aspect ratio pyramidal tips obtained by wet etching of (100) and (111) silicon

Different approaches to obtain sharp silicon tips with a variety of aspect ratios, for potential use in advanced microelectronics applications, were studied. Tips suited for atomic force microscopy and field emission arrays were formed by wet chemical etching of (100) and (111) single crystal silicon in KOH, TMAH and HNA etchant. Apex sharpening with thermal oxidising step resulted in tips with apex radius below 20 nm as evaluated by SEM analysis. The fabrication of silicon tips with isotropic etching on either (100) or (111) silicon confirmed that uniformity across the wafer and tip sharpness are lower with respect to anisotropically etched structures. Pyramidal tips with aspect ratios between 0.5 and 1.2 were obtained by these methods.

Study of low-temperature direct bonding of (111) and (100) silicon wafers under various ambient and surface conditions

Wafer bonding of commercially available (100) and (111) silicon wafers was performed in the range of temperatures from 80°C to 400°C in nitrogen, oxygen and low-vacuum atmosphere. Surface preparation with modified RCA cleaning method and hot nitric acid provided extremely clean and hydrophilic surfaces that were later brought into intimate contact. Various combinations of surface terminations such as thin chemical native silicon dioxide and thick thermal silicon dioxide on (111)- and (100)-oriented silicon wafers were prepared and investigated. Bonding quality evaluated by the tensile strength measurements showed the highest values obtained for strengthening in nitrogen atmosphere, reaching 12 MPa. Correlation between prebonding treatment, initial surface roughness and microroughness was made revealing the influence on the bonding energy. Interface imperfections of bonded samples were investigated by infrared transmission imaging revealing bubbles at the bonded interface only in case when bonding was performed in oxygen ambient. Thickness of the chemical native oxide after surface preparation step necessary for good bonding was found to be at least 0.8 nm. Wafers in the (111) orientation exhibited higher bonding abilities compared to (100) in case of bonding wafers with native oxides. This is believed to be due to higher density of available bonding sites as a consequence of enhanced chemical oxide growth rate and its homogeneity on (111) surface. Moreover, it is believed that due to higher positive charge of oxides grown on (111)-oriented silicon compared to (100), desorption of interfacial water is accelerated thus increasing the bonding energy at lower temperature. In conclusion, the best bonding results were obtained by bonding wafers with thick thermal oxide to (111) wafers with native oxide and annealed in nitrogen ambient.

Effective roughness reduction of {100} and {311} planes in anisotropic etching of {100} silicon in 5% TMAH

We have performed an investigation to study the nature of surface roughness on {100} and {311} planes obtained by wet anisotropic etching of {100} silicon in 5% tetramethyl ammoniumhydroxide (TMAH) etchant. The surface roughness, which is in most cases a consequence of hillock formation at low concentrations of TMAH, was studied as a function of etch temperature, re-etch time, stirring conditions and the addition of small amounts of ammonium peroxodisulfate (AP). A short re-etching step performed in 25% TMAH or 5% TMAH+AP was found to decrease the total roughness obtained after the prolonged etching in 5% TMAH. We have found that smooth {311} planes without hillocks can be obtained by etching in 5% TMAH with the addition of only 0.25% of AP. Due to the decomposition of AP in the etching process as determined by increased surface roughness, a replenishing of the additive is proposed. Experimental results have shown an increased surface roughness and reduced etch rates of the {100} and {311} planes by increasing the agitation of the 5% TMAH etch solution.

Temperature effects modeling in silicon piezoresistive pressure sensor

Temperature effects and compensation for temperature drift of offset voltage in silicon piezoresistive pressure sensors were analyzed. The derived equations take into account temperature dependences, the piezoresistive effect and thermal expansion of the diaphragm inducing additional stresses. Measurements performed on fabricated sensors confirm the importance of diaphragm induced thermal stress. Accordingly, a computer program enabling fast calculation of sensor sensitivity and offset voltage was conceived. Based on the analysis, an approach to compensation for temperature drift of offset voltage is proposed and confirmed with experimental results.

Wet etching of silicon structures bounded by (311) sidewalls

Abstract Wet chemical etching of narrow recessed ridges and bossed structures on (100) silicon is presented with emphasis on convex and concave corner dynamic behaviour during maskless etching. Ridge and boss sidewalls that arise from the new masking technique are (311) crystal planes and offer a new dimension in wet micromachining. It was found that convex corner undercutting is significantly reduced if (311) planes are utilised instead of (111) bounding planes. Rounding of concave corners that arise through prolonged etching is reported which is particularly emphasised in KOH and less in TMAH etchant. Addition of IPA is experimentally investigated showing minor influence on etching conditions and on reducing the maskless undercut of convex corners. Etch rates and dimensional control of some microstructures are discussed and presented comparatively for both etching systems in a temperature range from 70 to 100°C.

Contact pressure–aided spectroscopy

Abstract. Contact pressure induced by manually operated fiber optic probes can significantly affect the optical properties of the studied tissue. If the contact pressure and the changes in optical properties are measured properly, then the complementary information can be used to obtain additional insight into the tissue physiology. However, as reliable assessment of the contact pressure in the existing diffuse reflectance setups is difficult, the impact of contact pressure is usually neglected or considered as a source of errors. We introduce a measurement system for controlled application of contact pressure and for the acquisition of diffuse reflectance spectra, which is suitable for in vivo studies and for overcoming the limitations of the existing measurement setups. A spectral-contact-pressure plane is proposed to present the combined information, highlighting the unique tissue response to the applied pressure.

Calibration and error correction algorithms for smart pressure sensors

The essential properties of smart sensor error correction algorithms and calibration procedures according to the IEEE1451.2 standard are presented. Using a modern microcontroller design, it is possible to implement STIM in a single chip design, but due to complexity of error correction and calibration algorithms it is preferable to distribute these tasks between several processors available in a network. A description of a simple calibration algorithm intended for implementation in modular STIM (smart transducer interface module) design is given. Other calibration and error correction approaches were tested on designed and fabricated smart sensor networks. Their implementation is discussed and the results of the most promising bivariate spline approximation algorithm are presented.

Side-illuminated 100 μm pitch X-ray detector for digital radiology

A side-illuminated silicon X-ray strip detector for digital radiology with 100 μm pitch was designed, fabricated and characterized. In order to reduce noise and improve resolution of the detector, design and processing was optimized for low leakage currents, high dynamic resistance of biasing resistors, reduced strip pitch and wafer thickness. Operation of the field oxide field effect transistor (FOXFET) structure was analyzed by a 2D numerical device simulator and compared to experimental results. Measured results reveal that the detector is suitable for application in X-ray detection systems.

Characterization of integrated thin film Pt heater and temperature sensors on Si platform

In this paper the design, fabrication methods and characterization of thin film meandered Pt resistive heater (size 20 × 20 mm2) with integrated Pt sensors on Si platform is presented. Pt heaters and temperature sensors were fabricated simultaneously by DC sputtering method. It was found that the fabrication process has significant influence on the electrical properties of the realized thin film resistive layers, which also explains the discrepancies between the calculated and measured values that were obtained during this work. Annealing temperature of the Pt layers was found to influence significantly the final resistance of the deposited layer and was performed at 500°C. To reduce the heat loss, the heater and temperature sensors were covered by Pyrex glass with prefabricated cavity. By this new approach, the power consumption was reduced due to improved thermal insulation. A comparative study was performed and showed that we can decrease the power consumption by more than 25% only by this approach. Measured temperature coefficient of resistance (TCR) for temperature sensors and the heater was between 1400-1700 ppm and showed that also the heater can be used as temperature sensing element.