D. S. Rawal
Solid State Physics Laboratory
Network
Latest external collaboration on country level. Dive into details by clicking on the dots.
Publication
Featured researches published by D. S. Rawal.
IEEE Transactions on Electron Devices | 2014
Sreenidhi Turuvekere; D. S. Rawal; Amitava DasGupta; Nandita DasGupta
Dependence of gate leakage current on Al mole fraction of AlGaN/GaN high-electron mobility transistors (HEMTs) is studied using temperature-dependent current-voltage and capacitance-voltage characteristics. The reverse leakage current is mostly dominated by Poole-Frenkel (PF) emission in the structures used in this brief. However, it is observed that at higher mole fractions, due to higher electric field across the barrier, Fowler-Nordheim (FN) tunneling also contributes to the gate leakage current even at room temperature and above. An expression for critical temperature below which FN tunneling component becomes comparable with or more than PF emission component is presented. It is concluded that the dominant gate leakage mechanisms in III-N HEMTs are dependent on mole fraction of the barrier material and the temperature. However, the relative strengths of PF emission and FN tunneling are also influenced by various process-dependent parameters.
Journal of The Electrochemical Society | 2003
D. S. Rawal; V. R. Agarwal; H. S. Sharma; B. K. Sehgal; R. Gulati; H. P. Vyas
In this study we have investigated the reactive ion etching of 60 μm diam, 200 μm deep holes in 3 in. diam semi-insulating GaAs wafer using a combination of CCl 2 F 2 and CCl 4 gases for fabrication of through substrate via holes for grounding in monolithic microwave integrated circuits (MMICs). The effect of process parameters viz. pressure, CCl 4 /CCl 2 F 2 ratio, and power on GaAs etch rate and resultant etch profile was investigated. Two kind of masks, photoresist and Ni, were used to etch GaAs and their performance was compared by investigating effect on etch rate, etch depth, etch profile, and surface morphology. The etch profile, etch depth, and surface morphology of as-etched samples were characterized by scanning electron microscopy. The desired 200 μm deep strawberry profile, with a top diam = 60 ′ 10 μm and bottom diam = 180 ′ 10 μm, was obtained at 40 mTorr process pressure with an average etch rate ∼1.3 μm/min using Ni mask. The vias were then metallized by depositing a thin seed layer of Ti/Au (1000 A) using radio frequency sputtering and Au (5 μm) electroplated to connect the front side pad and back side ground plane. The parasitic inductance offered by these vias was ∼76 pH. The developed process was then integrated into the MMIC process line and a 16-18 GHz amplifier was fabricated using grounding vias with yield >90%.
Journal of The Electrochemical Society | 2005
V. R. Agarwal; D. S. Rawal; H. P. Vyas
Developments in the etching process for fabrication of back-side via holes in GaAs based monolithic microwave integrated circuits are reviewed. Attention is focused on critical issues concerning via hole fabrication. The requirements of the process of via hole etching are considered. The suitability of various fabrication techniques, and the associated chemistry, has been examined. The effects of various process parameters such as power, pressure, and gas flow rate on the etch characteristics have been discussed. The influence of the masking material, via hole dimensions and the wafer size on the etch characteristics have been discussed from the point of view of increasing packing density in advanced chip fabrication. Finally, the state of the art and the issues concerning the via hole etching process are described.
Journal of Vacuum Science and Technology | 2004
Meena Mishra; M. Jagadesh Kumar; Shweta Shukla; H. P. Vyas; D. S. Rawal; A. Naik; Himanshu Sharma; B. K. Sehgal; R. Gulati
In this article an inverse modeling technique is used to design a 0.25 μm delta doped pseudomorphic high electron mobility transistor (PHEMT). The technique is based on the results obtained from the device simulator MEDICI. The technique has been used for determining the structural and physical parameters of the device for a defined threshold voltage, maximum trans conductance and the gate voltage at which the trans conductance peaks. Empirical formulas have been obtained based on a data bank created by varying the device structural parameters. Using these formulas, a 0.25 μm delta doped PHEMT has been designed and a good agreement has been obtained between the measured data and the predicted data.
international workshop on physics of semiconductor devices | 2007
Ritu Daipuria; Sindhu Dayal; Robert Laishram; Somna S. Mahajan; D. S. Rawal; K. M. Bhat; H.S. Sharma; B. K. Sehgal; R. Muralidharan
Passivation of psuedomorphic high electron mobility transistor (pHEMT) based MMICs by silicon nitride films deposited by PECVD is reported here. These films were first optimized for passivation of MESFETs to get desired performance. No degradation in pHEMT/MESFET characteristics like Idss, gm Vp and Cgs were observed while only nominal degradation was found in Schottky diode ideality factor eta and its breakdown voltage VB. The refractive index of the films was 1.92 with 1200 A0 thickness. The films have high dielectric strength > 5E6 V/cm, low tensile stress < 5E9 dynes/cm2 and dielectric constant 6.9 -7.1. The etch rate of the film is ~ 900 A0/min in BHF and fine patterns can be etched with 1-2 minutes etch time in BHF. The film composition was analyzed by FTIR and SIMS studies.
Materials Science and Engineering B-advanced Functional Solid-state Materials | 1997
B. K. Sehgal; R. Gulati; A. A. Naik; Seema Vinayak; D. S. Rawal; H. S. Sharma
Abstract Rf sputtered Ti/Pt/Au Schottky contacts with varying titanium thickness have been made on (n)GaAs by the lift-off process under actual device processing conditions. The ideality factor of the Schottky barrier is dose to unity (∼ 1.07) with a barrier height of 0.80 ± 0.02 eV. The contacts with Ti films as thin as 100 A remain thermally stable with annealing up to 400°C. These contacts have been next used to fabricate submicron gate length GaAs MESFETs. The MESFETs gm increases with improved gate diode ideality but is not a strong function of it. The effect of Schottky gate annealing on the MESFETs dc characteristics shows that IDSS, gm, Vp and VR(GS) remain stable with annealing upto 350°C and degrade with 400° anneal.
Archive | 2018
Chandan Sharma; Robert Laishram; D. S. Rawal; Seema Vinayak; Rajendra Singh
Cumulative dose gamma radiation effects on current-voltage characteristics of GaN Schottky diodes have been investigated. The different area diodes have been fabricated on AlGaN/GaN high electron mobility transistor (HEMT) epi-layer structure grown over SiC substrate and irradiated with a dose up to the order of 104 Gray (Gy). Post irradiation characterization shows a shift in the turn-on voltage and improvement in reverse leakage current. Other calculated parameters include Schottky barrier height, ideality factor and reverse saturation current. Schottky barrier height has been decreased whereas reverse saturation current shows an increase in the value post irradiation with improvement in the ideality factor. Transfer length measurement (TLM) characterization shows an improvement in the contact resistance. Finally, diodes with larger area have more variation in the calculated parameters due to the induced local heating effect.
AIP Advances | 2017
Chandan Sharma; Robert Laishram; D. S. Rawal; Seema Vinayak; Rajendra Singh
This article reports an experimental approach to analyze the kink effect phenomenon which is usually observed during the GaN high electron mobility transistor (HEMT) operation. De-trapping of charge carriers is one of the prominent reasons behind the kink effect. The commonly observed non-monotonic behavior of kink pattern is analyzed under two different device operating conditions and it is found that two different de-trapping mechanisms are responsible for a particular kink behavior. These different de-trapping mechanisms are investigated through a time delay analysis which shows the presence of traps with different time constants. Further voltage sweep and temperature analysis corroborates the finding that different de-trapping mechanisms play a role in kink behavior under different device operating conditions.
Archive | 2014
Sindhu Dayal; Somna S. Mahajan; D. S. Rawal; B. K. Sehgal
We report here the fabrication of ion implanted GaAs hyperabrupt varactor diode that can be integrated in MMIC process. Varactor diodes with constant sensitivity γ of 0.55–0.65 with Cmax/Cmin varying from 2.5 to 3.5 have been fabricated. Varactors diode geometries with different anode lengths, anode width, single and multiple finger anodes with device area varying from 50 to 6,000 μm2 were fabricated. The breakdown voltage of >10 V have been obtained for all the different value capacitors ranging from 0.16 to 11.2 pF.
Archive | 2014
Henika Arora; D. S. Rawal; B. K. Sehgal
We present a simple non-destructive technique to characterize the AlGaN barrier layer thickness and sheet carrier concentration for AlGaN/GaN heterostructure. Characterization of AlGaN thickness and sheet carrier concentration has been carried out for AlGaN/GaN HEMT structure using the capacitance–voltage characterization of FATHEMT (dimension Lg = 20 µm, Wg = 150 µm). The estimated values for AlGaN thickness and the sheet carrier concentration (ns) were ~23.2 nm and ~1e13/cm2 respectively for MBE grown structure. The estimated values of AlGaN thickness are fairly matching well with measured data of HRXRD within variation of ±5 % and the estimated sheet carrier concentration values are also of the same order as evaluated using Hall Measurement.