R. Gulati
Solid State Physics Laboratory
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Journal of The Electrochemical Society | 2003
D. S. Rawal; V. R. Agarwal; H. S. Sharma; B. K. Sehgal; R. Gulati; H. P. Vyas
In this study we have investigated the reactive ion etching of 60 μm diam, 200 μm deep holes in 3 in. diam semi-insulating GaAs wafer using a combination of CCl 2 F 2 and CCl 4 gases for fabrication of through substrate via holes for grounding in monolithic microwave integrated circuits (MMICs). The effect of process parameters viz. pressure, CCl 4 /CCl 2 F 2 ratio, and power on GaAs etch rate and resultant etch profile was investigated. Two kind of masks, photoresist and Ni, were used to etch GaAs and their performance was compared by investigating effect on etch rate, etch depth, etch profile, and surface morphology. The etch profile, etch depth, and surface morphology of as-etched samples were characterized by scanning electron microscopy. The desired 200 μm deep strawberry profile, with a top diam = 60 ′ 10 μm and bottom diam = 180 ′ 10 μm, was obtained at 40 mTorr process pressure with an average etch rate ∼1.3 μm/min using Ni mask. The vias were then metallized by depositing a thin seed layer of Ti/Au (1000 A) using radio frequency sputtering and Au (5 μm) electroplated to connect the front side pad and back side ground plane. The parasitic inductance offered by these vias was ∼76 pH. The developed process was then integrated into the MMIC process line and a 16-18 GHz amplifier was fabricated using grounding vias with yield >90%.
Iete Technical Review | 1997
Ishwar Chandra; R. Gulati; H. S. Sharma
A Gunn diode is a simple two terminal source of low-noise, high frequency microwave power. It is most commonly used as local oscillator in critical microwave and mm-wave systems. The system requirement of frequency agility and temperature stability impose stringent demands on the device performance and hence on its material and fabrication technology. The present paper discusses some of the technological innovations attempted in this direction along with results obtained. Some of the issues addressed are carrier concentration ramping to check velocity degradation in the active layer, power optimisation by in-situ etching, minimisation of dead zone and thermal management. Physics, design and fabrication technology and testing of Gunn diodes is also briefly described in this article.
Infrared Physics | 1983
G.J. Chaturvedi; R. Gulati; P.L. Trivedi; G. Chandra; H. S. Sharma; Ishwar Chandra; B.L. Sharma
Abstract In this paper the possibility of using GaAs MESFETs under Schottky gate illumination for photodetection and switching has been experimentally demonstrated. Semitransparent Au metallization is used for Schottky gate formation. The results discussed here provide experimental support to the behaviour predicted for such configurations.
Materials Science and Engineering B-advanced Functional Solid-state Materials | 1997
B. K. Sehgal; R. Gulati; A. A. Naik; Seema Vinayak; D. S. Rawal; H. S. Sharma
Abstract Rf sputtered Ti/Pt/Au Schottky contacts with varying titanium thickness have been made on (n)GaAs by the lift-off process under actual device processing conditions. The ideality factor of the Schottky barrier is dose to unity (∼ 1.07) with a barrier height of 0.80 ± 0.02 eV. The contacts with Ti films as thin as 100 A remain thermally stable with annealing up to 400°C. These contacts have been next used to fabricate submicron gate length GaAs MESFETs. The MESFETs gm increases with improved gate diode ideality but is not a strong function of it. The effect of Schottky gate annealing on the MESFETs dc characteristics shows that IDSS, gm, Vp and VR(GS) remain stable with annealing upto 350°C and degrade with 400° anneal.
Microelectronic Device and Multilevel Interconnection Technology | 1995
Seema Vinayak; B. K. Sehgal; G. Sai Sarvanan; Sindhu Dayal; D. S. Rawal; Akshay A. Naik; R. Gulati; Ishwar Chandra
The formation of multilevel interconnects in GaAs MMIC fabrication depends mainly on the adhesion of the interconnect metals with the intermediate dielectric and with the substrate. The metal lines in our experimental study were formed by depositing multilayer films by rf sputtering technique over spin-coated polyimide and Plasma Enhanced Chemical Vapor Deposited (PECVD) silicon nitride (Si3Nx). It is observed that samples with a poor adhesion between the second level metal and Si3Nx show bubbling of blistering in the metal layer when subjected to subsequent high temperature cycles in the fabrication process. It is also found that the choice of certain metal schemes develops a stress between the first level metal and GaAs at the bond pads which peel off at the time of bonding. The present experimental study was undertaken to avoid the loss of the circuit at such advanced stages of fabrication like bonding or second level interconnect formation. The study brings out the dependence of the bondability of the circuit bond pads and the formation of the interconnect lines on the rf sputtering parameters, the premetallization treatment, the choice of the multilayer metal schemes and the thickness of the metals in the multilayer metallization.
Materials Science and Engineering B-advanced Functional Solid-state Materials | 1994
R.K. Purohit; G.C. Dubey; Sindhu Dayal; R. Gulati; V.R. Balakrishnan; Koteshwar Rao; A.K. Sreedhar
Abstract Semi-insulating liquid-incapsulated Czochralski GaAs wafers are generally used as substrates for the fabrication of monolithic microwave integrated circuits. In the fabrication process, the wafer is subjected to temperature cycling during the various stages of processing, namely post-ion implantation annealing, plasma deposition of dielectrics, deposition of ohmic contacts and its alloying etc., which can induce strains and dislocations in the host wafer. In this paper, a study using the photoluminescence (PL) technique has been carried out to understand the behaviour of different peaks under different processing conditions. Owing to temperature cycling and plasma deposition, it affects the PL peaks which is indicative of different types of defect introduced during processing.
Materials Science and Engineering B-advanced Functional Solid-state Materials | 1994
R. Gulati; B. K. Sehgal; H.S. Sharma; Seema Vinayak; Sindhu Dayal; A.A. Naik
Abstract Poor adhesion of the metal to the dielectric film may lead to loss of the device or circuit in the final stages of fabrication, for instance bonding. The present experimental study was carried out to improve metal adhesion over polyimides and Si 3 N x and SiO x grown by plasma-enhanced chemical vapour deposition. The metal lines were formed by depositing multilayer films by r.f. sputtering followed by electroplating of gold in some cases. The samples with poor metal-dielectric adhesion showed bubbling or blistering in the metal layer when subjected to temperature cycles in the subsequent process steps. The experimental study proved that in addition to the r.f. sputtering parameters and the premetallization treatment, the thickness of the first metal layer in the multilayer metal scheme is critical to adhesion.
Materials Science and Engineering B-advanced Functional Solid-state Materials | 1994
Ishwar Chandra; R. Gulati; H. S. Sharma; S. Mohan; A. A. Naik; G. Sai Saravanan
Abstract Discrete millimetre-wave devices, i.e. Gunn and IMPATT diodes, dissipate a large amount of power in the form of heat. Devices fabricated with an integral heat sink (IHS) are known to show superior performance compared with conventional devices. A novel process was developed for the fabrication of IHS integral bonding ribbon (IBR) millimetre-wave devices. The method employs “through holes” generated on the wafer as marks for “front to back” alignment of the IHS and IBR. The process is found to be highly reproducible and versatile. Devices have shown several advantages in terms of ease of processing and yield. The process can thus be used to fabricate devices different semiconductor materials and possibly for all devices requiring the IHS-IBR configuration.
international conference on vlsi design | 1992
Harsh; B. K. Sehgal; V. R. Balakrishnan; S. Mohan; A. A. Naik; P. Agarwal; R. Gulati; R. K. Purohit; Ishwar Chandra
A GaAs 2-input NOR gate using the Buffered FET Logic approach has been designed, fabricated and tested. The logic gate has been simulated on SPICE 3 sofhvare for I GHz clock rate afrer taking into account the contributions due to parasitics and limitations in actual device processing. The layout of the circuit was designed ajer suitably modifring the AutoCAD KIO sofware to generate coordinates in the SPD (Source Pattern Data) format for direct mask fabrication by E-beam lithography. The circuit has been fabricated successfully by the fully planar selective implantation process and I um linewidth Ti/WAu gate metallisation. The DC and RF performance has been demonstrated experimentally and was found to match the simulated results.
Iete Journal of Research | 1986
Ak Aggarwal; Uc Ray; R. Gulati; Ishwar Chandra
GaAs Gunn devices are being increasingly used in the harmonic mode to deliver appreciable power in the mm-wave band. In this paper, the second harmonic response of indigenously developed X-band Gunn devices are treated. The circuit requirements and experimental results obtained in a conventional resonant disc type oscillator circuit are discussed in details.