Dae Young Jeon

Oxide double-layer nanocrossbar for ultrahigh-density bipolar resistive memory.

S. H. Chang , S. B. Lee , S. M. ang , Y S. C. Chae , H. K. oo , Y Prof. W Noh . . TReCFI, Department of Physics and Astronomy Seoul National University Seoul 151-747, Korea E-mail: twnoh@snu.ac.kr D. Jeon , . Y S. J. Park , Prof. G. Kim . TSchool of Electrical Engineering Korea University, Seoul 136-701, Korea Prof. B. S. Kang Department of Applied Physics Hanyang University Ansan, Gyeonggi-do 426-791, Korea Dr. M.-J. Lee Semiconductor Device Laboratory Samsung Advanced Institute of Technology Yongin, Gyeonggi-do 446-712, Korea

Scaling and Graphical Transport-Map Analysis of Ambipolar Schottky-Barrier Thin-Film Transistors Based on a Parallel Array of Si Nanowires

Si nanowire (Si-NW) based thin-film transistors (TFTs) have been considered as a promising candidate for next-generation flexible and wearable electronics as well as sensor applications with high performance. Here, we have fabricated ambipolar Schottky-barrier (SB) TFTs consisting of a parallel array of Si-NWs and performed an in-depth study related to their electrical performance and operation mechanism through several electrical parameters extracted from the channel length scaling based method. Especially, the newly suggested current-voltage (I-V) contour map clearly elucidates the unique operation mechanism of the ambipolar SB-TFTs, governed by Schottky-junction between NiSi2 and Si-NW. Further, it reveals for the first-time in SB based FETs the important internal electrostatic coupling between the channel and externally applied voltages. This work provides helpful information for the realization of practical circuits with ambipolar SB-TFTs that can be transferred to different substrate technologies and applications.

Controlled surface adsorption of fd filamentous phage by tuning of the pH and the functionalization of the surface

The surface adsorption of fd filamentous phage (fd phage) dispersed in different solution pHs was investigated with functionalized SiO2/Si substrates. The fd phages at high pH (∼9.0) were well-adsorbed on the SiO2/Si surface that was functionalized by 3-aminopropyltriethoxysilane, whereas those at low pH (∼3.0) were well-adsorbed on the cleaned SiO2/Si surface. The high affinity of the carboxylic acid groups (COO−) at high pH (∼9.0) was attributed to the fact that they give a higher adsorption to the positively charged amine groups (NH3+) on the surface of the substrate, similar to the effect of H3O+ at low pH (∼3.0) in a solution on the surface of the hydroxyl groups on the substrate (OH−). Interestingly, the aligned structures of the fd phage at intermediate pH (∼7.0), caused by the locally positively charged coat protein of the fd phage and the shear forces along the washing and blowing direction, were identified. The effective spring constant of the fd phage bundles was estimated to be 0.672 N/m using...

Flat-band voltage and low-field mobility analysis of junctionless transistors under low-temperature

This paper presents the low-temperature characteristics of flat-band (VFB) and low-field mobility in accumulation regime (μ0_acc) of n-type junctionless transistors (JLTs). To this end, split capacitance-to-voltage (C–V), dual gate coupling and low-temperature measurements were carried out to systematically investigate VFB. Additionally, the gate oxide capacitance per unit area Cox and the doping concentration ND were evaluated as well. Accounting for the position of VFB and the charge based analytical model of JLTs, bulk mobility (μB) and μ0_acc were separately extracted in volume and surface conduction regime, respectively. Finally, the role of neutral scattering defects was found the most limiting factor concerning the degradation of μB and μ0_acc with gate length in planar and tri-gate nanowire JLTs.

Channel access resistance effects on charge carrier mobility and low-frequency noise in a polymethyl methacrylate passivated SnO2 nanowire field-effect transistors

Channel access resistance (Rsd) effects on the charge carrier mobility (μ) and low-frequency noise (LFN) in a polymethyl-methacrylate (PMMA) passivated tin-oxide nanowire (SnO2-NW) field effect-transistor were investigated. To this end, the Y function method was employed for direct electrical parameters extraction without Rsd influence. Numerical simulation was used to evaluate gate-to-channel capacitance (Cgc) accounting for the electrostatic gate coupling effects through PMMA passivation layer. Furthermore, LFN measurements were carried out to study the SnO2/dielectrics interface. The carrier number fluctuation (CNF) noise model was found appropriate to interpret LFN data provided Rsd influence is included.

Sidewall mobility and series resistance in a multichannel tri-gate MOSFET

The sidewall mobility and the series resistance in a multichannel tri-gate MOSFET were examined with low-temperature measurement and 2D numerical simulation. With sidewall mobility separated from total transfer characteristics, it was shown that the sidewall conduction is mainly affected by the surface roughness scattering. The effect of surface roughness scattering on sidewall mobility was evaluated with the mobility degradation factor normalized by the low field mobility, which exhibited an almost six times higher value than that of top surface mobility. The series resistance of the multichannel tri-gate MOSFET was studied by comparing with that of the planar MOSFET. Through 2D numerical simulation, it was revealed that relatively high series resistance of the multichannel tri-gate MOSFET is attributed to the variation of doping concentration in the source/drain extension region in the device.

Enhanced voltage-current characteristics of GaN nanowires treated by a selective reactive ion etching

In characterizing the electrical properties of individual NWs (nanowires), the amorphous oxide layer on the surface of NWs is known to limit the electrical conductivity owing to the contact barriers between metal electrodes and NWs. To remove the native oxide layer, a systematic reactive ion etching (RIE) was performed, resulting in a gradual decrease of the diameters of NWs. Voltage-current characteristics of the GaN NW devices treated by tuning the RIE process were improved as reflected by a 1000 times increase in conductance, which was in turn attributed to the removal of the thick (d∼3.5nm) contact barrier formed by the native oxide layer.

Static and low frequency noise characterization of N-type random network of carbon nanotubes thin film transistors

Static and low frequency noise (LFN) characterizations in two-dimensional (2D) N-type random network thin film transistors (RN-TFTs) based on single-walled carbon nanotubes were presented. For the electrical parameter extraction, the Y-function method was used to suppress the series resistance (Rsd) influence. The gate-to-channel capacitance (Cgc) was directly measured by the split capacitance-to-voltage method and compared to 2D metal-plate capacitance model (C2D). In addition, to account for the percolation-dominated 2D RN-TFTs, a numerical percolation simulation was performed. LFN measurements were also carried out and the results were well interpreted by the carrier number and correlated mobility fluctuation model. Finally, one-dimensional (1D) cylindrical analytical capacitance based model (C1D) was suggested and applied to provide better consistency between all electrical parameters based on experimental and simulation results.

Low-temperature operation of junctionless nanowire transistors: Less surface roughness scattering effects and dominant scattering mechanisms

The less surface roughness scattering effects, owing to the unique operation principle, in junctionless nanowire transistors (JLT-NW) were shown by low-temperature characterization and 2D numerical simulation results. This feature could allow a better current drive under a high gate bias. In addition, the dominant scattering mechanisms in JLT-NW, with both a short (LM = 30 nm) and a long channel (LM = 10 μm), were investigated through an in-depth study of the temperature dependence of transconductance (gm) behavior and compared to conventional inversion-mode nanowire transistors.

Separation of surface accumulation and bulk neutral channel in junctionless transistors

The error rate of low-field mobility (μ0) extracted from the conventional Y-function method in junctionless transistors (JLTs) is found to be linearly proportional to the channel doping concentration (Nd) for a typical value of the first order mobility attenuation factor θ0 ≈ 0.1 V−1. Therefore, for a better understanding of their physical operation with higher accuracy, a methodology for the extraction of the low-field mobility of the surface accumulation channel (μ0_acc) and the bulk neutral channel mobility (μbulk) of JLTs is proposed based on their unique operation principle. Interestingly, it is found that the different temperature dependence between μ0_acc and μbulk is also confirming that the distribution of point defects along the channel in the heavily doped Si channel of JLTs was non-uniform.