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Dive into the research topics where Daisuke Kosemura is active.

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Featured researches published by Daisuke Kosemura.


Japanese Journal of Applied Physics | 2006

UV-Raman Spectroscopy System for Local and Global Strain Measurements in Si

Atsushi Ogura; Kosuke Yamasaki; Daisuke Kosemura; Satoshi Tanaka; Ichiro Chiba; Ryosuke Shimidzu

We developed a new UV-Raman spectroscopy system for local and global strain measurements in Si. Using a 364 nm excitation laser, strain in an ultra-thin Si film can be measured. Because of the resonance effect using this particular wave length, reasonably short measurement time is realized to obtain strain mapping with keeping the sample at sufficiently low temperature. An in situ wavenumber calibration system has been newly developed for superior wavenumber resolution and precision of approximately 0.1 cm-1. A quasi-line shape excitation light source has also been developed to verify the effective spatial resolution. Strain mapping and spectral measurements for relaxation by rapid thermal annealing in strained-Si substrates are demonstrated.


Applied Physics Letters | 2007

Strain-induced transconductance enhancement by pattern dependent oxidation in silicon nanowire field-effect transistors

Aya Seike; T. Tange; Y. Sugiura; Ikushin Tsuchida; H. Ohta; Takanobu Watanabe; Daisuke Kosemura; Atsushi Ogura; Iwao Ohdomari

Transconductance (gm) enhancement in n-type and p-type nanowire field-effect-transistors (nwFETs) is demonstrated by introducing controlled tensile strain into channel regions by pattern dependent oxidation (PADOX). Values of gm are enhanced relative to control devices by a factor of 1.5 in p-nwFETs and 3.0 in n-nwFETs. Strain distributions calculated by a three-dimensional molecular dynamics simulation reveal predominantly horizontal tensile stress in the nwFET channels. The Raman lines in the strain controlled devices display an increase in the full width at half maximum and a shift to lower wavenumber, confirming that gm enhancement is due to tensile stress introduced by the PADOX approach.


Japanese Journal of Applied Physics | 2008

Characterization of Strain for High-Performance Metal-Oxide-Semiconductor Field-Effect-Transistor

Daisuke Kosemura; Yasuto Kakemura; Tetsuya Yoshida; Atsushi Ogura; Masayuki Kohno; Tatsuo Nishita; Toshio Nakanishi

Strain evaluation in a small area is required because the extremely short channel length in state-of-the-art metal–oxide–semiconductor field-effect transistors (MOSFETs) leads to a narrow and shallow channel region. The strain in this limited area strongly affects the device performance owing to carrier mobility modification. We used UV–Raman spectroscopy with a quasi-line-shape excitation source and a two-dimensional charge-coupled-device detector in order to evaluate the strain distribution in Si or Si-on-insulator (SOI) substrates with a patterned SiNx film. As results, the strain was concentrated at the SiNx/Si interface and SiNx film pattern edge. A large tensile (compressive) strain was induced by the SiNx film with inner tensile (compressive) stress in the space region that corresponds to a channel region of the n- or p-MOSFETs. We assume that these large strains in the space region are the origin of the mobility enhancement in n- or p-MOSFETs. Furthermore, in addition to the size effect of channel length, we confirmed that the strain could be controlled by changing SiNx film thickness, film stress, and the substrate (SOI or bulk-Si). The quantitative evaluation of strain by means of simulation is also discussed.


symposium on vlsi technology | 2012

High-mobility and low-parasitic resistance characteristics in strained Ge nanowire pMOSFETs with metal source/drain structure formed by doping-free processes

Keiji Ikeda; Mizuki Ono; Daisuke Kosemura; Koji Usuda; Minoru Oda; Yuuichi Kamimuta; Toshifumi Irisawa; Yoshihiko Moriyama; Atsushi Ogura; Tsutomu Tezuka

Metal source/drain (S/D) Ge nanowire MOSFETs with a compressive strain as high as 3.8% were fabricated by the 2-step Ge-condensation technique without intentional doping for the S/D. Record high inversion hole mobility (μ<sub>eff</sub> = 855 cm<sup>2</sup>/Vs @ N<sub>s</sub> = 5×10<sup>12</sup>cm<sup>-2</sup>) and saturation drain current 731μA/μm at V<sub>d</sub>=-1V were achieved among Ge nanowire pFETs ever reported. It is found that the extremely low contact resistivity ρ<sub>c</sub> ~ 4×10<sup>-8</sup>O cm<sup>2</sup> for the Schottky contact contributes to the high saturation current as well as the high mobility.


IEEE Transactions on Electron Devices | 2012

Fin-Height Effect on Poly-Si/PVD-TiN Stacked-Gate FinFET Performance

Tetsuro Hayashida; Kazuhiko Endo; Yongxun Liu; S. O'uchi; Takashi Matsukawa; Wataru Mizubayashi; Shinji Migita; Yukinori Morita; Hiroyuki Ota; Hiroki Hashiguchi; Daisuke Kosemura; Takahiro Kamei; Junichi Tsukada; Yuki Ishikawa; Hiromi Yamauchi; Atsushi Ogura; Meishoku Masahara

We compared the electrical characteristics, including mobility and on -state current <i>I</i><sub>on</sub>, of n<sup>+</sup>-poly-Si/PVD-TiN stacked-gate FinFETs with different fin heights <i>H</i><sub>fin</sub>. The mobility was enhanced in devices with taller fins due to increased tensile stress. However, as gate length <i>Lg</i> decreases, <i>I</i><sub>on</sub> for devices with tall fins becomes worse, probably due to a high parasitic resistance <i>Rp</i>. Furthermore, <i>V</i><sub>th</sub> variation increased with increasing <i>H</i><sub>fin</sub> due to rough etching of the fin sidewall. Process technologies for reducing <i>Rp</i> and etching technology that yields smooth precise profiles are essential to exploit the high performance of tall FinFETs.


Applied Physics Letters | 2007

Transconductance enhancement of nanowire field-effect transistors by built-up stress induced during thermal oxidation

Aya Seike; T. Tange; Itsutaku Sano; Y. Sugiura; Daisuke Kosemura; Atsushi Ogura; Iwao Ohdomari

The authors report the enhancement of transconductance in nanowire field effect transistors due to build-up tensile stress during thermal oxidation. To evaluate the effect of stress, nanowires were thermally oxidized at (A) 900°C∕15min, (B) 850°C∕1h, and (C) 850°C∕1h with a subsequent 1000°C annealing. The transconductance of sample B is enhanced 2.6 times compared to sample A. No enhancement of transconductance is observed in sample C. The Raman spectra indicate tensile stress in sample B and compressive stress in sample C. This establishes that gm enhancement is due to the build-up tensile stress in nanowires, but is diminished by viscoelastic relaxation.


Japanese Journal of Applied Physics | 2009

Study of Strain Induction for Metal–Oxide–Semiconductor Field-Effect Transistors using Transparent Dummy Gates and Stress Liners

Daisuke Kosemura; Munehisa Takei; Kohki Nagata; Hiroaki Akamatsu; Masayuki Kohno; Tatsuo Nishita; Toshio Nakanishi; Atsushi Ogura

Strain induction was studied on a sample that had a dummy gate tetraethyl orthosilicate–silicon dioxide (TEOS–SiO2) and SiN film by UV-Raman spectroscopy with high spatial and high wave-number resolution. The UV laser penetrated through the dummy gate that was transparent to UV light, which enabled us to evaluate strain in the channel of the metal–oxide–semiconductor field-effect transistor (MOSFET) model. Furthermore, we compared stress profiles obtained by finite element (FE) calculations with those obtained by UV-Raman measurements. There was a difference between the stress profiles in the line-and-space pattern sample and in the dummy-gate sample; large compressive (tensile) strains were concentrated at the channel edges in the dummy-gate sample with the compressive (tensile) stress liner, although both tensile and compressive strains existed at the channel edge in the line-and-space pattern sample. The results from UV-Raman spectroscopy were consistent with those obtained by the FE calculation.


IEEE Transactions on Electron Devices | 2009

Channel-Stress Enhancement Characteristics for Scaled pMOSFETs by Using Damascene Gate With Top-Cut Compressive Stress Liner and eSiGe

Satoru Mayuzumi; Shinya Yamakawa; Daisuke Kosemura; Munehisa Takei; Yasushi Tateshita; Hitoshi Wakabayashi; Masanori Tsukamoto; Terukazu Ohno; Atsushi Ogura; Naoki Nagashima

A damascene-gate process enhances the drivability in the shorter gate length region, as compared to a conventional gate-first process for pFETs with compressive stress SiN liners and embedded source/drain SiGe. The origin of the gate length effect for damascene-gate pFETs is studied by using UV-Raman spectroscopy and stress simulation. Moreover, the relationship between channel strain and channel width is analyzed, and the enhancement effect of the drivability on channel width is demonstrated. It is found that channel strain is considerably enhanced with the narrower channel width and shorter gate length by the process combination of the damascene gate and stress enhancement techniques. Owing to the enhancement effects of both channel width and gate length, a high drive current of 1090 muA/mum at Vds = Vgs = -1.0 V and Ioff = 100 nA/mum is achieved for the damascene-gate pFET with 0.3-mum channel width and 40-nm gate length.


Applied Physics Express | 2012

Investigation of Phonon Deformation Potentials in Si1-xGex by Oil-Immersion Raman Spectroscopy

Daisuke Kosemura; Koji Usuda; Atsushi Ogura

Phonon deformation potentials (PDPs) in Si1-xGex were investigated by oil-immersion Raman spectroscopy. Transverse optical (TO) and longitudinal optical (LO) phonon modes were separately excited for strained Si1-xGex as well as strained Si. PDPs p and q were derived with the use of the Raman wavenumber shifts of TO and LO. The obtained PDPs for Si, SiGe0.153, and SiGe0.297 were compared with one another. Furthermore, the strain-shift coefficient was also obtained and compared with the previously reported values. The p and q values allow us to precisely evaluate anisotropic biaxial stress states in Si and Si1-xGex by oil-immersion Raman spectroscopy.


Japanese Journal of Applied Physics | 2011

Evaluation of Strained-Silicon by Electron Backscattering Pattern Measurement: Comparison Study with UV-Raman Measurement and Edge Force Model Calculation

Motohiro Tomita; Daisuke Kosemura; Munehisa Takei; Kohki Nagata; Hiroaki Akamatsu; Atsushi Ogura

We demonstrate the results of strain (stress) evaluation obtained from electron backscattering pattern (EBSP) measurement for samples of a strained Si-on-insulator (SSOI) and a Si substrate with a patterned SiN film. Two-dimensional stress distributions were obtained in 40×40 µm2 areas of the SSOI. The biaxial stress state was also obtained in the SSOI. Furthermore, clear cross-hatch contrast was observed, especially in the distribution of shear stress Sxy, in contrast to with the other distributions of normal stress Sxx and Syy. One- and two-dimensional stress distributions in the Si substrate with the patterned SiN film were also obtained from EBSP measurement. Moreover, the results were compared with those of UV-Raman measurement and edge force model calculation, and were found to have a good correlation with each other. EBSP measurement was used to measure the complicated biaxial stress including the shear stress in a sample with a 150-nm-wide space pattern. We can conclude that EBSP measurement is a useful method for precisely measuring stress with high spatial resolution.

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Koji Usuda

National Institute of Advanced Industrial Science and Technology

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