Damien Macq

A CMOS analog front-end circuit for an FDM-based ADSL system

A CMOS analog front-end circuit for an FDM-based ADSL system is presented. The circuit contains all analog functions including AGC amplifiers, continuous-time band pass filters, /spl Sigma//spl Delta/ AD/DA converters, and digital decimation and interpolation filters. On-chip automatic tuning of the bandpass filters provides more than 300% center frequency range with 1% frequency accuracy. The higher-order /spl Sigma//spl Delta/ AD/DA converters achieve 12-b data conversion at 1.54 Msamples/s with an oversampling ratio of only 32. The 0.7 /spl mu/m CMOS circuit measures 65 mm/sup 2/ and consumes 1.9 W from a single 5 V power supply.

A 10-bit pipelined switched-current A/D converter

A modified RSD algorithm has been implemented in a switched-current pipelined A/D converter. The offset insensitivity of the RSD Converter reduces the effect of several nonidealities proper to current copier cells. Moreover, the benefits resulting from the large tolerances inherent to the RSD algorithm and the pipelined architecture result in an improved conversion rate. Measurements on a first prototype give an integral nonlinearity error less than 0.8 LSB for 10-bit accuracy. Power dissipation is 20 mW and silicon area is 2.5 mm/sup 2/. The measured sampling rate is 550 kS/s. It is an improvement by a factor of twenty compared to known equivalent CMOS switched-current converters. It is nevertheless still well below the predicted conversion rate of 4.5 MHz, which should be obtained once this A/D converter is integrated into an analog front-end. Full compatibility with standard digital technologies makes this kind of converter attractive for low power, medium-fast converters with 10-bit accuracy. >

A highly linear CMOS Gm-C bandpass filter for video applications

A 14th order CMOS transconductance-C (Gm-C) bandpass filter for video applications is described. By using highly linear Gm-C integrators, the filter achieves 75 dB dynamic range over 700 kHz noise bandwidth. The measured IM3 @ 600 kHz is -61 dB for a 4 Vpp input signal. On-chip automatic frequency tuning provides more than 300% center frequency range of the filter with 1% frequency accuracy. The 0.7 /spl mu/m CMOS filter measures 4.8 mm/sup 2/ and consumes 70 mW from a single 5 V power supply.

An analog front end for multi-standard power line carrier modem

A multi-standard, highly-linear analog front end for use in power line modems shows 105 dB linearity in a 9-95 kHz frequency band. It is for use in mixed analog-digital ASICs where it shows a 10 dB performance improvement over existing solutions due to interference-reduction design techniques.

Silicon Integration for Digital Cellular Communication

Mobile cellular terminals built for new cellular communication systems rely heavily on advanced semiconductor parts. This paper gives an overview of the various implementations currently in use in commercial GSM products. It discusses the recently announced evolutions and offers conclusions on longer term perspectives both at ASIC and Terminal product standpoints.