Jan Sevenhans

An analog radio front-end chip set for a 1.9 GHz mobile radio telephone application

A single-chip BiCMOS analog radio for mobile telephony is a strategic utopia today because few foundries provide a BiCMOS technology with sufficient bipolar f/sub T/ for the low-noise mixers in the receiver and transmitter phase modulators and demodulators at 1.9 GHz. The solution presented in this paper is to use an RF silicon bipolar chip for the high frequency circuits of the transceiver and synthesizer and standard low cost CMOS for low-frequency transceiver analog signal processing and synthesizer functions.<<ETX>>

ECL-CMOS and CMOS-ECL interface in 1.2- mu m CMOS for 150-MHz digital ECL data transmission systems

The design of a full-CMOS circuit that converts voltage signals from those used for emitter-coupled logic (ECL) to CMOS and vice versa, for use in digital data transmissions with clock frequencies up to 150 MHz, is described. Extremely high performances are obtained due to a novel circuit principle, in both the ECL-to-CMOS convertor and the CMOS-to-ECL convertor. A wideband CMOS amplifier used in the ECL-to-CMOS convertor, incorporating a current injection technique to increase the bandwidth of the circuit, is also presented. A circuit principle is presented to realize an extremely fast CMOS-to-ECL conversion, based on a current switching technique and charge injection to compensate the large output capacitance. Both circuits make use of replica biasing to ensure maximum switching speed in the ECL-to-CMOS convertor and correct ECL output levels in the CMOS-to-ECL convertor. An ECL-CMOS-ECL repeater has been designed in a 1.2- mu m double-metal CMOS process. >

A transistor-only switched current sigma-delta A/D converter for a CMOS speech CODEC

This paper describes the design and measurement results of a 1-b A/D converter based on a transistor-only switched current (SI) second-order sigma-delta modulator. The 1-b A/D converter was simulated and processed in ES2 1.5 /spl mu/m CMOS technology. The second-order filter is based on class AB switched current-integrators. The analog current memory cells in the integrator are optimized for linear operation with a strong class AB overlap region to avoid class B operation and cross-over distortion. Measurement results on the first silicon performing 11-b resolution show that this circuit technique is promising for speech CODEC A/D conversion. >

Analog front end for DMT-based VDSL

A 12MHz 760mW analog front end for DMT-based VDSL integrates all active components except line driver in a single BiCMOS 0.35/spl mu/m ASIC. When fully active, the ASIC dissipates 480mW at 3.3V supply, providing resolution equivalent to 12b without trimming.

Silicon germanium and silicon bipolar RF circuits for 2.7 V single chip radio transceiver integration

A 2.7 V radio transceiver for 900/1900 MHz was realized in a 50 GHz f/sub T/ silicon germanium technology. The single chip transceiver contains the RX mixers, TX mixers, quadrature generator, amplifiers, quadrature phase shifters, the VCO and the 64/65 prescaler. Most of the circuits were realized in a 20 GHz bipolar technology before. In the 50 GHz SiGe technology the noise figure was improved by 2 dB and the additional bandwidth allows for true dual mode operation with identical gain curves for both 900 and 1900 MHz operation. The transceiver drives an external power amplifier and needs at least 15 dB external gain of a low noise amplifier in front of RX mixers. An integrated LNA is optional and feasible in the 50 GHz SiGe technology with low R/sub b/ enabling a 2 dB noise figure.

A four-channel digital signal processor in 1.2- mu m CMOS with on-chip D/A and A/D conversion serving four speech channels in a new-generation subscriber line circuit

The major component for a new-generation line circuit was designed and fabricated in a 1.2- mu m CMOS technology. The circuit includes digital signal processing of receive (RX) and transmit (TX) signals as well as the analog front end of four subscriber lines to a PCM (pulse code modulation) digital exchange. The device operates on a single 5-V power supply. The four-channel digital signal-processor including the analog front ends is fabricated on a 40-mm/sup 2/ 1.2- mu m CMOS die area. The DSP functions, the RX and TX filters, the decimator, the interpolator, and the A/ mu -law transcoder are included as independent data paths, one for the TX and RX filters, one for the decimator, and another for the interpolator, the digital sigma-delta modulator, and the transcoder. The on-chip analog front end contains a notch filter to cancel the 12/16-kHz payphone signal, a switched-capacitor PDM A/D and D/A converter, and smoothing filters. On the first measured samples, the signal-to-distortion ratio is measured to be 33 dB at -45 dBmo for -7 dB gain setting. >

CMOS LED driver and PIN receiver for fiber optical communication at 150 Mbit/sec

A test chip for an integrated full CMOS LED driver has been realized with a modulation current of 60 mA at a maximum bit rate of 155 Mb/s. A CMOS receiver is evaluated to amplify PIN diode photocurrents less than 10 µA at the same bit rate of 155 Mb/s. Both circuits are integrated on one chip. The circuit has been developed in a 0.8-µm digital CMOS process.

Full CMOS continuous time filters for GSM applications

This paper describes full cmoscontinuous time filter design techniques which can meet the specifications commonly set for gsmapplications. First several cmosfilter design techniques are overviewed. The ota-ctechnique is discussed to some more detail. To overcome the main drawback of the lower total harmonic distortion in ota-ctechniques very linear operational transconductance amplifiers (ota)are required. Such an ota,together with the applied linearisation techniques is discussed. To fulfil high accuracy in cut- off frequencies of the filter an active tuning system is necessary. A new on- chip tuning system is presented. The paper concludes with a practical design example for the gsmsystem. Therein the different ota-ctechniques discussed are illustrated.Résuméľarticle décrit la réalisation de filtres analogiques àtemps continu plutôt qu’àdonnées échantillonnées,en insistant sur la technologie ota-cbasée sur des condensateurs et des amplificateurs opérationnels du type transconductance. Cette technologie est comparée àcelles des capacités commutées et des filtres actifs rc.Elle utilise un transducteur linéaire de tension en courant. Une linéaritéélevée permet de maintenir une faible distorsion harmonique. Un accord automatique de fréquence sur la puce est nécessaire pour obtenir une grande précision des fréquences de coupure. Un exemple concret est un passe- bas de Legendre du 4eordre.

Silicon Integration for Digital Cellular Communication

Mobile cellular terminals built for new cellular communication systems rely heavily on advanced semiconductor parts. This paper gives an overview of the various implementations currently in use in commercial GSM products. It discusses the recently announced evolutions and offers conclusions on longer term perspectives both at ASIC and Terminal product standpoints.

Wireless telecom silicon integration: analog design for radio, baseband and speech spectrum

The application today, pushing analog design for CMOS and RF‐bipolar into new frontiers is definitely the mobile radio telephony. New telecom systems like GSM, PCN, DECT, DCS, Wireless in the loop ... are all developing very rapidly and will enable us very soon to organise a complete telephone network with full coverage for your car, as well as in your kitchen and on your office desk. In Europe the major telecom companies have worked together to establish one common standard for cellular mobile radio communications at 900 MHz. Similar things are happening for other wireless personal communication systems. Basically the cellular radio telephone, the wireless PABX and the wireless SLIC are bringing the same challenges to analog circuit design: maximum integration of the basic radio functions into 1 or 2 silicon chips, CMOS, Bipolar or BiCMOS or GaAs. The analog circuit designer for radio telephone applications will need all the state of the art analog design know‐how available today, from RF‐mixers and GHz range low noise amplifiers and local oscillator synthesizers over base band 100 kHz CMOS analog to low frequency speech analog to digital conversion. And for all these circuits the message is: minimum power consumption for battery autonomy, minimum silicon area for maximum functional integration per die to obtain a small, low cost pocket size radio telephone.