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Dive into the research topics where Daniel Zehnder is active.

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Featured researches published by Daniel Zehnder.


IEEE Electron Device Letters | 2011

1200-V Normally Off GaN-on-Si Field-Effect Transistors With Low Dynamic on -Resistance

Rongming Chu; Andrea Corrion; Mary Chen; Ray Li; D. Wong; Daniel Zehnder; Brian Hughes; Karim S. Boutros

This letter reports high-voltage GaN field-effect transistors fabricated on Si substrates. A halide-based plasma treatment was performed to enable normally off operation. Atomic layer deposition of Al2O3 gate insulator was adopted to reduce the gate leakage current. Incorporation of multiple field plates, with one field plate connected to the gate electrode and two field plates connected to the source electrode successfully enabled a high breakdown voltage of 1200 V and low dynamic on-resistance at high-voltage operation.


IEEE Electron Device Letters | 2011

Low-Phase-Noise Graphene FETs in Ambipolar RF Applications

J. S. Moon; D. Curtis; Daniel Zehnder; S. Kim; D. K. Gaskill; Glenn G. Jernigan; R. L. Myers-Ward; Charles R. Eddy; P. M. Campbell; Kangmu Lee; Peter M. Asbeck

In this letter, we present both the 1/f noise and phase noise performance of top-gated epitaxial graphene field-effect transistors (FETs) in nonlinear circuit applications for the first time. In the case of frequency doublers, the fundamental signal is suppressed by 25 dB below the second harmonic signal. With a phase noise of -110 dBc/Hz measured at a 10-kHz offset, a carrier-to-noise degradation (ΔCNR) of 6 dB was measured for the frequency doubler. This implies noiseless frequency multiplication without additional 1/f noise upconversion during the nonlinear process. The frequency multiplication was demonstrated above the gigahertz range. The 1/f noise of top-gated epitaxial graphene FETs is comparable or lower than that of exfoliated graphene FETs.


applied power electronics conference | 2012

GaN HFET switching characteristics at 350V/20A and synchronous boost converter performance at 1MHz

Brian Hughes; James Lazar; Stephen Hulsey; Daniel Zehnder; Daniel Matic; Karim S. Boutros

Gallium Nitride HFET (Hetero-junction Field Effect Transistors) power switches are poised to replace silicon MOSFETs and IGBTs in many high-performance power switching applications. To realize the benefits of these fast-switching GaN devices, special circuit and packaging techniques are necessary. Drive circuits are significantly improved compared to conventional silicon MOSFET drivers. SMD packaging techniques are employed to minimize source inductance. The gate drive provides rise time of a few ns, and drain voltage slew rates of more than 80 V/ns are observed. These circuits are used for double-pulse switching performance characterization and in a synchronous boost converter operating under the same switching conditions. The GaN HFETs switch 350V and 20A in 15 ns with switching energy of 68 μJ. The 1MHz 300V synchronous switching boost converter is 94% efficient, with an output power of 1.2KW.


compound semiconductor integrated circuit symposium | 2011

A 95% Efficient Normally-Off GaN-on-Si HEMT Hybrid-IC Boost-Converter with 425-W Output Power at 1 MHz

Brian Hughes; Yeong Y. Yoon; Daniel Zehnder; Karim S. Boutros

A 2:1 351 V hard-switched boost converter was constructed using high-voltage GaN high-electron-mobility transistors grown on Si substrates and GaN Schottky diodes grown on Sapphire substrates. The high speed and low on-resistance of the GaN devices enables extremely fast switching times and low losses, resulting in a high conversion efficiency of 95% with 425-W output power at 1 MHz. The boost converter has a power density of 175 W/in3. To our knowledge, these results are the best reported on GaN devices, and the highest for 1MHz switching.


international electron devices meeting | 2009

Normally-off 5A/1100V GaN-on-silicon device for high voltage applications

Karim S. Boutros; Shawn D. Burnham; D. Wong; K. Shinohara; Brian Hughes; Daniel Zehnder; C. McGuire

We report the DC and switching performance of a normally-off 5A/1100V GaN-on-Si device. The device had a breakdown field of 95V/µm and a V<inf>B</inf><sup>2</sup>/R<inf>on,sp</inf> of 272MW/cm<sup>2</sup>. A 360V/180W boost converter was operated at 200KHz, with an efficiency ≫92%. Respectively, these values are the highest for a normally-off GaN-on-Si device.


IEEE Electron Device Letters | 2016

An Experimental Demonstration of GaN CMOS Technology

Rongming Chu; Yu Cao; Mary Chen; Ray Li; Daniel Zehnder

This letter reports the first demonstration of gallium nitride (GaN) complementary metal-oxide-semi-conductor (CMOS) field-effect-transistor technology. Selective area epitaxy was employed to have both GaN N-channel MOSFET (NMOS) and P-channel MOSFET (PMOS) structures on the same wafer. An AlN/SiN dielectric stack grown by metal-organic chemical vapor deposition served as the gate oxide for both NMOS and PMOS, yielding enhancement-mode N- and P-channel with the electron mobility of 300 cm2/V-s and hole mobility of 20 cm2/V-s, respectively. Using the GaN CMOS technology, a functional inverter integrated circuit was fabricated and characterized.


applied power electronics conference | 2014

Normally-off GaN-on-Si multi-chip module boost converter with 96% efficiency and low gate and drain overshoot

Brian Hughes; James Lazar; Stephen Hulsey; Marcel Musni; Daniel Zehnder; Austin Garrido; Raghav Khanna; Rongming Chu; Sameh G. Khalil; Karim S. Boutros

A high efficiency synchronous GaN half-bridge boost converter with fast switching and low overshoot is achieved by minimizing parasitic inductance and critical damping the gate drive. A normally-off GaN-on-Si 2.4kW synchronous halfbridge Multi-Chip Module (MCM) is designed with a power-loop inductance of ~4nH using transmission-line techniques to minimize inductance. The gate circuit inductance is reduced to 1nH using bare MOSFET die for driving the GaN gates and a 0.5mil flexible substrate gate transmission-line. Configured as a boost converter with no added gate resistance, the synchronous half-bridge switches 400V in only 1.3ns. The high voltage slew rates of 325V/ns results in overshoot of 200V on the drain and 4V overshoot on the gate, both of which may damage the GaN switches. Critically damping the gate turn-on reduces overshoot to safe levels of 1V gate overshoot and ~20V drain overshoot. The gate damping increases drain fall time to 3ns, which only decreases efficiency by 0.2% at 1MHz. The resulting synchronous boost converter has an efficiency of 96%, switching 300V at 1MHz with 50% duty cycle and an output power of 2.4kW. The high efficiency of GaN switches and the 0.6C/W thermal resistance of the MCM enable a maximum junction temperature of 65°C.


device research conference | 2013

Normally-Off GaN-on-Si transistors enabling nanosecond power switching at one kilowatt

Rongming Chu; Brian Hughes; Mary Chen; David F. Brown; Ray Li; Sameh G. Khalil; Daniel Zehnder; Steve Chen; Adam J. Williams; Austin Garrido; Marcel Musni; Karim S. Boutros

Power switches based on GaN-on-Si transistor technology have the advantage of high switching speed and low fabrication cost. This paper reports our recent advancement in device technology which enabled nanosecond switching at one kilowatt, with an unprecedented slew rate of 325 V/ns. The high switching speed opens up pathways for emerging applications such as envelope tracking and wireless power charging.


international symposium on power semiconductor devices and ic's | 2012

Normally-off GaN-on-Si metal-insulator-semiconductor field-effect transistor with 600-V blocking capability at 200 °C

Rongming Chu; David F. Brown; Daniel Zehnder; Xu Chen; Adam J. Williams; Ray Li; Mary Chen; Scott Newell; Karim S. Boutros

We report a GaN-on-Si metal-insulator-semiconductor field-effect transistor (MISFET) with normally-off operation and 600-V blocking capability at 200 °C temperature. The temperature-dependences of threshold voltage, on-resistance, and leakage characteristics are discussed.


device research conference | 2011

High performance GaN-on-Si power switch: Role of substrate bias in device characteristics

Rongming Chu; Daniel Zehnder; Brian Hughes; Karim S. Boutros

Field-effect transistors based on the low-cost GaN-on-Si platform are promising candidates for highefficiency power switching at high frequencies. We have reported a normally-off GaN-on-Si switch with a blocking voltage of 1200V, and a very low dynamic on-resistance [1]. For future improvement of the GaN-on-Si switching technology, it is important to understand the role of the non-insulating Si-substrate in device characteristics. In this paper, we discuss the static (DC) and dynamic (switching) characteristics of the GaN-on-Si device, focusing on the impact of bias conditions applied on the Si substrate. It was found that state-of-the-art dynamic on-resistance characteristics of the GaN-on-Si switch can be achieved by properly terminating the Si substrate potential.

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