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Dive into the research topics where Danny Crookes is active.

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Featured researches published by Danny Crookes.


IEEE Transactions on Audio, Speech, and Language Processing | 2011

A Corpus-Based Approach to Speech Enhancement From Nonstationary Noise

Ji Ming; Ramji Srinivasan; Danny Crookes

Temporal dynamics and speaker characteristics are two important features of speech that distinguish speech from noise. In this paper, we propose a method to maximally extract these two features of speech for speech enhancement. We demonstrate that this can reduce the requirement for prior information about the noise, which can be difficult to estimate for fast-varying noise. Given noisy speech, the new approach estimates clean speech by recognizing long segments of the clean speech as whole units. In the recognition, clean speech sentences, taken from a speech corpus, are used as examples. Matching segments are identified between the noisy sentence and the corpus sentences. The estimate is formed by using the longest matching segments found in the corpus sentences. Longer speech segments as whole units contain more distinct dynamics and richer speaker characteristics, and can be identified more accurately from noise than shorter speech segments. Therefore, estimation based on the longest recognized segments increases the noise immunity and hence the estimation accuracy. The new approach consists of a statistical model to represent up to sentence-long temporal dynamics in the corpus speech, and an algorithm to identify the longest matching segments between the noisy sentence and the corpus sentences. The algorithm is made more robust to noise uncertainty by introducing missing-feature based noise compensation into the corpus sentences. Experiments have been conducted on the TIMIT database for speech enhancement from various types of nonstationary noise including song, music, and crosstalk speech. The new approach has shown improved performance over conventional enhancement algorithms in both objective and subjective evaluations.


international conference on image processing | 2000

Application of fractals to the detection and classification of shoeprints

Ahmed Bouridane; A. Alexander; Mokhtar Nibouche; Danny Crookes

The most common clues left at a crime scene when a crime is committed are shoeprint impressions. These impressions are useful in the detection of criminals and the linking of crime scenes. A novel technique for use in the detection and classification of shoeprint impressions has been developed. The technique is based on fractal based feature extraction and pattern matching methods. The computerized system developed has been extensively tested on a large database of real shoeprint impressions and is robust to small variations of image orientations and/or translations.


international conference on image processing | 2007

Automatic Recognition of Partial Shoeprints Based on Phase-Only Correlation

Mourad Gueham; Ahmed Bouridane; Danny Crookes

In this paper, a method for automatically recognizing partial shoeprint images for use in forensic science is presented. The technique uses the phase-only correlation (POC) for shoeprints matching. The main advantage of this method is its capability to match low quality shoeprint images accurately and efficiently. In order to achieve superior performance, the use of a spectral weighting function is also proposed. Experiments were conducted on a database of images of 100 different shoes available on the market. For experimental evaluation, test images including different perturbations such as noise addition, blurring and textured background addition were generated. Results have shown that the proposed method is very practical and provides high performance when processing low quality partial-prints. The use of a weighting function provides an improvement in the recognition rate in particularly difficult cases.


field-programmable custom computing machines | 2001

High Level Programming for FPGA Based Image and Video Processing Using Hardware Skeletons

Khaled Benkrid; Danny Crookes; J. Smith; Abdsamad Benkrid

In this paper, we present a new approach to developing a general framework for efficient FPGA based Image Processing algorithms. This approach is based on the new concept of Hardware Skeletons. A hardware skeleton is a parameterised description of a task-specific architecture, to which the user can supply parameters such as values, functions or even other skeletons. A skeleton contains built-in rules that will apply optimisations specific to the target hardware at the implementation phase. The framework contains a library of reusable skeletons for a range of common Image Processing operations. The library also contains high level skeletons for common combinations of basic image operations. Given a complete algorithm description in terms of skeletons, an efficient hardware configuration is generated automatically. We have developed a library of hardware skeletons for common image processing tasks, with optimised implementations specifically for Xilinx XC4000 FPGAs. This paper presents and illustrates our hardware skeleton approach in the context of some common image processing tasks, based on an implementation on VISICOM’s VigraVision™ FPGA based video board.


Proceedings of SPIE | 1999

FPGA implementation of image component labeling

Danny Crookes; Khaled Benkrid

Connected Component Labelling is an important task in intermediate image processing. Several algorithms have been developed to handle this problem. Hardware implementations have typically been based on massively parallel architectures, with one logical processing element per pixel. This approach requires a great deal of logic, so current solutions are often implemented in VLSI rather than on FPGAs, and are limited in the size of image which can be labelled.


european conference on circuit theory and design | 2007

FPGA implementation of 3D discrete wavelet transform for real-time medical imaging

Richard M. Jiang; Danny Crookes

3D discrete wavelet transform (DWT) is a compute-intensive task that is usually implemented on specific architectures in many real-time medical imaging systems. In this paper, a novel area-efficient high-throughput 3D DWT architecture is proposed based on distributed arithmetic. A tap-merging technique is used to reduce the size of DA lookup tables. The proposed architectures were designed in VHDL and mapped to a Xilinx Virtex-E FPGA. The synthesis results show the proposed architecture has a low area cost and can run up to 85 MHz, which can perform a five-level 3D wavelet analysis for seven 128 times 128 times 128 volume images per second.


Journal of Systems Architecture | 1999

Architectures for high performance image procesing: the future

Danny Crookes

This paper considers the past, present and future of architectures for high performance image processing. After reviewing a number of representative designs of image processing-specific architectures, four current approaches are considered in more detail: standard microprocessor technology, DSP processors, parallel processing and dynamically reprogrammable hardware in the form of Field Programmable Gate Arrays (FPGAs). A final section considers which approaches are more likely to be successful in the future.


parallel computing | 2002

Towards a general framework for FPGA based image processing using hardware skeletons

Khaled Benkrid; Danny Crookes; Abdsamad Benkrid

In this paper, we present our approach to developing a general framework for FPGA based Image Processing. This framework is based on a library of hardware skeletons. A hardware skeleton is a parameterised description of a task-specific architecture. A skeletons implementation will apply optimisations specific to the target hardware. The library normally contains a range of alternative skeletons for the same task, perhaps tailored for different data representations. The library also contains high level skeletons for compound operations, whose implementation can apply appropriate optimisations. Given a complete algorithm description in terms of skeletons, an efficient hardware configuration is generated automatically. We have developed a library of hardware skeletons for common image processing tasks, with optimised implementations specifically for Xilinx XC4000 FPGAs. This paper presents and illustrates our hardware skeleton approach in the context of some common image processing tasks. It demonstrates our approach to the broader problem of achieving optimised hardware configurations while retaining the convenience and rapid development cycle of an application-oriented, high level programming model.


adaptive hardware and systems | 2008

Automatic Recognition of Shoeprints using Fourier-Mellin Transform

Mourad Gueham; Ahmed Bouridane; Danny Crookes; Omar Nibouche

This paper proposes a technique for automatically recognising shoeprint images for use in forensic science. The method uses the Fourier-Mellin transform to produce translation, rotation and scale invariant features. A two dimensional correlation is employed as the similarity metric for the classification process. Experiments were conducted on a database of 500 different shoeprint images representing a part of available shoes on the market. In order to test the robustness of the method, test images including different perturbations such as noise addition and cropping (partial shoeprints) were generated. Experimental results show that the proposed method is very practical providing attractive performance when processing distorted shoeprint images.


field-programmable custom computing machines | 2003

Design and implementation of a generic 2D orthogonal discrete wavelet transform on FPGA

Abdsamad Benkrid; Khaled Benkrid; Danny Crookes

This paper presents an FPGA architecture for the separable 2-D Biorthogonal Discrete Wavelet Transform (DWT) decomposition. The architecture is based on the Pyramid Algorithm Analysis, which handles computation along the border efficiently by using the method of symmetric extension. For a J stage wavelet transform of NxN images, our architecture has a period of N² cycles per NxN image, and requires only the minimum intermediate storage size necessary. The architecture is highly scalable for different filter lengths and different octave levels. The design of a specific 2-D Biorthogonal 9&7 Wavelet Transform and its implementation on the Xilinx Virtex-E is taken as a case study.

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Dive into the Danny Crookes's collaboration.

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Abdsamad Benkrid

Queen's University Belfast

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Ji Ming

Queen's University Belfast

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Peter Milligan

Queen's University Belfast

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Peter Kilpatrick

Queen's University Belfast

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N.S. Scott

Queen's University Belfast

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Mourad Gueham

Queen's University Belfast

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Ramji Srinivasan

Queen's University Belfast

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