David Byrd Ribner

A comparison of modulator networks for high-order oversampled Sigma Delta analog-to-digital converters

After a discussion of the practical problem of comparing the relative performance of all known high-order modulator networks with respect to resolution, stability, input range, component sensitivities, finite amplifier gains, and bandwidths, equations are derived and verified by computer simulation that relate reduction in signal-to-noise ratio to component mismatch and finite amplifier gain, allowing designers to choose the best network for a particular application. A third-order, sigma-delta ( Sigma - Delta ) oversampled analog-to-digital (A/D) modulator network is presented. It shows improved performance in most respects over previous modulators. Although its theoretical performance in the absence of circuit nonidealities is below that of the triple first-order cascade network, when practical impairments such as finite amplifier gains and component mismatch are considered, it displays superior performance. Gain and offset errors are potentially lower for this network due to its ability to use a single capacitor for input signal and D/A feedback. A markedly reduced sensitivity to nonidealities for this network implies that monolithic circuits could be manufactured with better processing yields and hence lower unit costs. >

A third-order multistage sigma-delta modulator with reduced sensitivity to nonidealities

A multistage third-order sigma-delta modulator, which is unconditionally stable and has a low sensitivity to component mismatch and op-amp performance limitations, has been designed and fabricated in a 1.2- mu m CMOS double-poly technology. The modulator, consisting of cascaded second- and first-order stages, is scaled to prevent performance degradation from integrator overload. In addition, the first-stage integrator output is used directly, instead of its quantization error, to facilitate ratioless input circuitry in the second stage. Experimental results indicate a signal-to-noise ratio of 93 and 90 dB at a signal-to-distortion ratio of 93 dB for sample rates of 24 and 80 kHz, respectively. >

An auto-ranging photodiode preamplifier with 114 dB dynamic range

A low noise photodiode preamplifier integrated circuit with auto-ranging gain capability has been designed, fabricated, and tested. When connected to a 25 pF input capacitance, the four-channel device has an input referred noise below 0.5 fC, which is just 3 dB above the minimum kTC noise. The preamp chip is designed to handle a full-scale charge input of 210 pC and has a 114 dB dynamic range. The device achieves a linearity specification of 0.01% of input reading /spl plusmn/0.25 ppm of full scale with a sample period of 1 ms. The chip consumes 135 mW and is 5.8 mm/spl times/7.4 mm in size.