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Dive into the research topics where David Frey is active.

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Featured researches published by David Frey.


applied power electronics conference | 2012

High frequency DC-DC converter using GaN device

Johan Delaine; Pierre-Olivier Jeannin; David Frey; Kevin Guepratte

This article deals with the conception of a 42V-12V isolated DC-DC converter using new GaN power transistor technology. Those components allow working at higher frequencies compare to classical silicon power components. Thus they allow increasing the power density of converters. Due to their high switching frequency, voltage and current commutation speed, they imply to take care of EMC problems, to use high frequency designed magnetic core, to adapt gate drive stage in order to increase the efficiency and to reduce power losses. This paper describes some driver and power circuit architecture to fulfill the specifications. The performance improvement of GaN device in comparison with Si device is investigated using converters.


IEEE Transactions on Industry Applications | 2009

Optimization of a DC Capacitor Tank

Philippe Pelletier; Jean-Michel Guichon; Jean-Luc Schanen; David Frey

The choice of a set of capacitors for a dc link may be very different depending on the system requirements and user constraints. This paper shows how to achieve the best choice of a hybrid association of electrolytic capacitor and higher frequency technology (polyester for instance). Maximum allowed rms current in the electrolytic capacitor is obviously taken into account. The input filter of a buck converter is chosen as example. Various constraints are considered: voltage ripple, differential-mode electromagnetic-interference level, losses, weight, volume, surface, etc. Objective function for optimization is defined by the user and may be any of the previous parameters. The optimized result consists in the number and the values of components for both capacitor technologies.


applied power electronics conference | 2010

Series connection of IGBT

Pierre-Olivier Jeannin; Eric Vagnon; David Frey; Jean-Christophe Crebier

This article analyzes the effects of parasitic capacitances in the series connection of IGBT, which exist naturally due to gate driver and power circuit geometry. Two solutions, that can be combined, are proposed to minimize these effects in order to achieve a better voltage balancing. The first one is based on gate driver self-powering technique. The second one is based on a vertical structure assembly of IGBT connected in series. The performance offered by these two complementary solutions is investigated and validated on a series connection of three IGBT in a chopper converter. Both simulation and experimental results show the effectiveness of our approaches.


IEEE Transactions on Power Electronics | 2006

Impedance criterion for power modules comparison

Jean-Luc Schanen; Christian Martin; David Frey; Robert-J. Pasterczyk

It is well known that power modules must exhibit as low as possible stray inductance. However, the total inductance of a power module is not the only parameter to indicate the electrical quality of the packaging. In this paper, mathematical criteria will be given, which will allow the evaluation of power modules interconnects with regard to several objectives: equal current constraints among the different paralleled dies, power-drive, and even drive-drive interactions.


ieee industry applications society annual meeting | 2004

1 MHz power factor correction boost converter with SiC Schottky diode

Pierre-Olivier Jeannin; David Frey; J.-C. Podvin; Jean-Paul Ferrieux; J. Barbaroux; Jean-Luc Schanen; B. Rivet

This paper deals with the design of 1 MHz switching frequency boost convert with silicon carbide power Schottky diodes. This application is designed to work as a power factor correction rectifier. With high breakdown voltage, high energy gap and good thermal conductivity, silicon carbide (SiC) is a serious challenger as a new power semiconductor material. Here we analyze switching behavior in order to evaluate losses in such applications. Then, we compare theoretical and experimental results on PFC boost application.


applied power electronics conference | 2011

System simulation for EMC network analysis

Mikaël Foissac; Jean-Luc Schanen; G. Frantz; David Frey; Christian Vollaire

This paper uses compact models of power electronics converters to represent their EMC behavior. The model does not need any knowledge of the converter design since it is identified from external measurements. Three different DC-DC converters will be identified and the model validated in various network environment. Then, the models association in a DC network will be studied.


applied power electronics conference | 2013

Improvement of GaN transistors working conditions to increase efficiency Of A 100W DC-DC converter

Johan Delaine; Pierre-Olivier Jeannin; David Frey; Kevin Guepratte

GaN transistors can be used instead of Si MOSFET, because they improve static and dynamic performances. Moreover, low power DC-DC converters are often not very efficient, so GaN represents a good solution to improve efficiency. This article presents a comparison between Si MOSFET and GaN HEMT performances by using them in a high frequency isolated DC-DC converter. The structure and his control are described, and the maximum efficiency is higher than 94%. After having highlighted critical points for efficiency, a way to improve working conditions of GaN transistors is investigated. The converter is based on EPC GaN components.


applied power electronics conference | 2009

High Efficiency Interleaved Power Electronics Converter for wide operating power range

K. Guepratte; P-O. Jeannin; David Frey; H. Stephan

The paper focuses on a new driving strategy for improving the efficiency of power converters even if they are not used at there nominal power. The converters are using an output filtering structure with magnetical coupling. These filtering structures are usually employed to minimize in a significant way the mass of the converters. These filters are normally sized to work with a fixed number of phases. To optimize the magnetic components, it is necessary to take into account some physical constraint, as the iron sections of the magnetic circuits and saturation problems. These problems are tricky, especially in case of the variation of the number of phase. A new control strategy is presented for interleaved and multilevel structure. Finally converter simulation results are compared with the experimental results. A 1.6kW (115V) converter realization is presented.


Journal of Power Electronics | 2012

A Novel DC Bus Voltage Balancing of Cascaded H-Bridge Converters in D-SSSC Application

Mehdi Saradarzadeh; Shahrokh Farhangi; Jean-Luc Schanen; David Frey; Pierre-Olivier Jeannin

This paper introduces a new scheme to balance the DC bus voltages of a cascaded H-bridge converter which is used as a Distribution Static Synchronous Series Compensator (D-SSSC) in electrical distribution network. The aim of D-SSSC is to control the power flow between two feeders from different substations. As a result of different cell losses and capacitors tolerance the cells DC bus voltage can deviate from their reference values. In the proposed scheme, by individually modifying the reference PWM signal for each cell, an effective balancing procedure is derived. The new balancing procedure needs only the line current sign and is independent of the main control strategy, which controls the total DC bus voltages of cascaded H-bridge. The effect of modulation index variation on the capacitor voltage is analytically derived for the proposed strategy. The proposed method takes advantages of phase shift carrier based modulation and can be applied for a cascaded H-bridge with any number of cells. Also the system is immune to loss of one cell and the presented procedure can keep balancing between the remaining cells. Simulation studies and experimental results validate the effectiveness of the proposed method in the balancing of DC bus voltages.


european conference on cognitive ergonomics | 2015

Silicon carbide power chip on chip module based on embedded die technology with paralleled dies

Guillaume Regnat; Pierre-Olivier Jeannin; Guillaume Lefevre; Jeffrey Ewanchuk; David Frey; Stefan Mollov; Jean-Paul Ferrieux

A new three dimensional package based on Printed Circuit Board (PCB) embedded die technology is presented in this paper. The package takes advantage of the Power Chip On Chip (PCOC) concept, where commutation cell is housed within the bus bar, allowing a very low inductance design for the package of up to 0.25 nH. Two key design challenges with the package relate to the layout and the thermal management. Thus, a parallelization technique enabling impedance balancing is developed for the layout and validated using four parallel Silicon Carbide (SiC) MOSFETs. Gate circuit is carefully designed allowing low inductive behavior and low electromagnetic coupling. Finally, the thermal management of the module is studied and die attach with direct copper filled vias is validated.

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Dive into the David Frey's collaboration.

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Seddik Bacha

Centre national de la recherche scientifique

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Jean-Paul Ferrieux

Centre national de la recherche scientifique

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Pierre-Olivier Jeannin

Centre national de la recherche scientifique

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Jean-Luc Schanen

École nationale supérieure d'ingénieurs électriciens de Grenoble

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Damian Sal y Rosas

Centre national de la recherche scientifique

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Sokchea Am

Centre national de la recherche scientifique

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Raphaël Caire

Centre national de la recherche scientifique

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Guillaume Regnat

Centre national de la recherche scientifique

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