Jean-Luc Schanen

“Black box” EMC model for power electronics converter

The generalization of switched mode power conversion in embedded networks generates new problems at system level: the prediction of ElectroMagnetic Compatibility behaviour of the complete system. In order to forecast the conducted emissions in the power lines, compact models of the power converters are needed. This paper aims to propose a generic black box model for converters connected to an embedded network. The methodology for identifying the model parameters will be given, as well as the model validation.

A Fault-Tolerant Control Strategy for Cascaded H-Bridge Multilevel Rectifiers

Reliability is an important issue in cascaded H-bridge converters (CHB converters) because they use a high number of power semiconductors. A faulty power cell in a CHB converter can potentially lead to expensive downtime and great losses on the consumer side. With a fault-tolerant control strategy, operation can continue with the undamaged cells; thus increasing the reliability of the system. In this paper, the operating principles and the control method for a CHB multilevel rectifier are introduced. The influence of various faults on the CHB converter is investigated. The method of fault diagnosis and the bypassing of failed cells are explained. A fault-tolerant protection strategy is proposed to achieve redundancy in the CHB rectifier. The redundant H-bridge concept helps to deal with device failures and to increase system reliability. Simulation results verify the performance of the proposed strategy.

Planar busbar optimization regarding current sharing and stray inductance minimization

The design of planar busbar as a must part of any present high power converter is particularly fine due to all electromagnetic phenomena which can not be easily predicted with appropriate simulation means. Among the numerous constraints which apply to this component, current sharing between all paralleled components (power IGBT modules and capacitors) and stray inductances responsible of both over-voltages and current unbalance are studied in the paper. Based on a dedicated inductive partial elements modeling the cabling rules are conceived and proposed following an optimization process is presented in order to achieve the optimal busbar design

Inside a power module

Due to high current commutation speed, it has become necessary to minimize stray inductances to reduce over voltage. This is a great challenge for the power converter designer. Integration of converters into ever smaller packages decreases stray inductance considerably but at the same time increases other phenomena (thermal issues and EMC disturbances) capable of decreasing reliability and efficiency of the system. This work presents a generic equivalent cabling model and examines the impact of parasitic inductance on current distribution imbalance. This study could therefore be used in thermal analysis in order to better understand the influence of packaging.

Empirical power MOSFET modeling: practical characterization and simulation implantation

This study deals with power MOSFET models. Parasitic capacitors are one of the main parameters for dynamic models, and have a critical influence on switching waveforms and switching losses. Most of classical models consider that these capacitors are one-voltage dependent. The aim of this paper is to present a new insight based on a physical structure analysis of charge locations and moves and electrical waveforms, both during switching transitions. Establishment of the model with respect to critical voltage changes is presented, and results are compared with experimental curves. This model appears to be more accurate and more reliable than PSPICE or manufacturer original models.

Reduction of conducted EMC using busbar stray elements

Busbar structures must first achieve the principal function of a low inductive, multiport interconnection. Therefore, large sheets, very close to each other are used. An interesting issue is to use the inherent capacitive effects of busbars for achieving an integrated EMI filter function. However, this may not cause any inductance degradation. Busbar topology including the ground potential brings some EMC filtering capability. A multilayer topology is proposed to both increase the capacitances of interest and decrease the stray inductance. This has been validated using simulations and experimental results. Finally, multipurpose busbars (Electrical link, Mechanical support, thermal dissipator, EMC filter) may be one of the future key points of Power Electronics integration.

Switching disturbance due to source inductance for a power MOSFET: analysis and solutions

In this paper some technological rules are given, in order to help the designer to choose correct parameter values (such as gate resistance), avoiding MOSFET switching disturbance due to common impedance coupling. The switching process is modeled, and the good understanding of switching disturbance leads to the desired technological rules, taking into account the MOSFET implementation (source inductance Ls).

Automatic layout optimization of an EMC filter

The transfer function of an EMC (Electro-Magnetic Compatibility) filter is strongly disturbed in high frequency due to stray electromagnetic phenomena. On the one hand the imperfections of the components but also all magnetic couplings on the other hand. Although these effects seem to be negative, it is possible to reduce the impacts of these imperfections on the filter response, and even to use them in order to improve its behavior. A proper arrangement of components and a clever layout of tracks are required. Nevertheless, the complexity of the problem makes unthinkable a manual construction. Therefore, this paper discusses the implementation of an automatic routing algorithm based on the PEEC method (Partial Equivalent Element Circuit), in order to consider the electro-magnetic aspect in the layout definition.

PWM Inverter Output Filter Cost-to-Losses Tradeoff and Optimal Design

This paper describes how to design the output filter of a pulsewidth-modulation inverter used in an uninterruptible power supply. Several constraints apply to this design: physical limitations of all material and components, output waveform quality, losses, cost, etc. All models used in the design process are described: semiconductor, inductor and capacitor losses, cost, total harmonic distortion, short-circuit behavior, etc. Input parameters are control law, switching frequency, inductor design parameters (number of turns and magnetic circuit), and capacitor values. Based on these design models, optimization is carried out, and cost-losses tradeoff curves are deduced. Two power levels (30 and 300 kVA) are taken as design example, with the same models, in order to show the robustness of the method.

Stability Approach for Vehicles DC Power Network: Application to Aircraft On-board System

Vehicles of the future stores, transports and use large amounts of electrical energy. The main components of DC networks are power electronic converters. Combinations of such converters are known to be unstable in certain situations. By investigating the causes of instability and comparing current methods, a state space representation is chosen for converter modelling. The concepts of sensitivity and participation factors applied to network models are proposed to address the requirement for algorithms aimed at optimisation. Conclusions are drawn for converters under development for aircraft systems. It is possible to identify parameters responsible for instability, sensitivity to network parameters at different operating points and the safety margins available. Thanks to this method, passive elements are optimised by reducing their global weight and volume