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Dive into the research topics where David L. Rhodes is active.

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Featured researches published by David L. Rhodes.


Proceedings of the Sixth International Workshop on Hardware/Software Codesign. (CODES/CASHE'98) | 1998

TGFF: task graphs for free

Robert P. Dick; David L. Rhodes; Wayne H. Wolf

We present a user-controllable, general-purpose, pseudorandom task graph generator called Task Graphs For Free (TGFF). TGFF creates problem instances for use in allocation and scheduling research. It has the ability to generate independent tasks as well as task sets which are composed of partially ordered task graphs. A complete description of a scheduling problem instance is created, including attributes for processors, communication resources, tasks, and inter-task communication. The user may parametrically control the correlations between attributes. Sharing TGFFs parameter settings allows researchers to easily reproduce the examples used by others, regardless of the platform on which TGFF is run.


international conference on computer aided design | 1999

Co-synthesis of heterogeneous multiprocessor systems using arbitrated communication

David L. Rhodes; Wayne H. Wolf

We describe the first co-design technique aimed at heterogeneous systems employing arbitrated communication. Arbitrated system design is especially difficult because communication scheduling is directly tied to task allocation. The method provides a complete co-design-i.e. generation of a hardware configuration along with an allocation and schedule for the execution of hard real-time data-dependent tasks. By using an actual scheduling analysis in the inner co-design loop, the method is readily able to address realistic system effects including various communication models like arbitration, as in PCI-based systems.


IEEE Journal of Solid-state Circuits | 2014

A –90 dBm Sensitivity Wireless Transceiver Using VCO-PA-LNA-Switch-Modulator Co-Design for Low Power Insect-Based Wireless Sensor Networks

Serkan Sayilir; Wing-Fai Loke; Jangjoon Lee; Harry Diamond; Benjamin Epstein; David L. Rhodes; Byunghoo Jung

This paper presents a wireless transceiver intended for insect-based wireless sensor networks (WSNs). The transceiver utilizes several design techniques developed to meet the challenging low power and low size requirements in insect-based WSNs. The techniques include current reuse in the voltage-controlled oscillator (VCO) and power amplifier (PA), fast PLL on/off switching for low-power on/off keying (OOK) modulation, and switching between transmit and receive (TX/RX) modes without an off-chip switch. Also, the VCO, PA, low noise amplifier (LNA), OOK modulator, and TX/RX switch are co-designed and integrated into a single block to reduce the system complexity significantly. The transceiver is designed and fabricated in a 0.13-μm CMOS process. The transmitter provides an output power in the range of -30 dBm to -4.4 dBm while consuming an average power of 1.2 mW to 4.5 mW. The phase locked-loop (PLL) does not use a high-Q external resonator, and its phase noise depends on the PA output power because of the current reuse in the VCO and PA. The PLL phase noise at 1 MHz offset at 2.4 GHz varies from -103.3 dBc/Hz to -116.7 dBc/Hz. The receiver achieves a sensitivity of -90 dBm at 1 Mbps data rate for a BER = 0.1%. An example wireless sensor node design utilizing the proposed wireless transceiver achieves a modest weight of 1 gram, and a small form factor of 12.5 mm × 12.5 mm.


Proceedings of the Seventh International Workshop on Hardware/Software Codesign (CODES'99) (IEEE Cat. No.99TH8450) | 1999

Overhead effects in real-time preemptive schedules

David L. Rhodes; Wayne H. Wolf

The hard real-time schedulability of dependent task-graphs is studied for single bus homogeneous multiprocessor systems. A model which includes interrupts and context switching as well as bus contention is developed. The model captures real-time operating system effects aimed at realistically modeling both intra-processor and inter-processor communications. A robust scheduler is used to assess the impact of interrupt service time (IST) and context switching time (CST) on schedulability. For the class of task-graphs studied, it is shown that schedulability is a nonlinear function of only the weighted sum of IST and CST.


ieee international conference on wireless information technology and systems | 2010

GPU-accelerated ray tracing for electromagnetic propagation analysis

Benjamin Epstein; David L. Rhodes

Due to ongoing improvements in the performance and programmability of commercially available Graphics Processor Units (GPUs), substantial increases in the execution speed of EM propagation analysis through ray tracing is now attainable. This paper presents recent results where RF ray tracing has been applied to analyze signal propagation over complex urban 3D scene models. The ray trace algorithms were programmed to operate as parallel processes over hundreds of core processors that make up the architecture of off-the-shelf GPU chips.


international conference on computer design | 1997

Allocation and data arrival design of hard real-time systems

David L. Rhodes; Wayne H. Wolf

The paper presents new models for process activation and process scheduling for real-time embedded systems. The authors introduce a realistic, yet high-level input data arrival model which includes both polled and interrupt-driven process activation. They consider the effect of combinations of these process activation styles on a static, priority-based, preemptive scheduler. Given a set of periodic tasks and a set of resources (e.g. processors), a configuration is defined as: i) a mapping of each process to a resource; ii) assignment of priority to each process; and iii) a mapping of each interprocess communication event to either a polled or interrupt-driven implementation. They present a new method which utilizes an exact schedule analysis to determine a configuration which can meet hard real time deadlines subject to a fixed limit on the number of interrupts available per resource. Task graph examples and comparisons are used to validate the method.


Journal of Bionic Engineering | 2013

Sound Modulation in Singing Katydids Using Ionic Polymer-Metal Composites (IPMCs)

Yan Zhou; Cheng-Wei Chiu; Carlos Sanchez; Jorge M. González; Benjamin Epstein; David L. Rhodes; S. Bradleigh Vinson; Hong Liang

Many insect families have evolved to produce and detect complex singing patterns for the purposes of mating, display of dominance, predator escape, and other needs. While the mechanisms of sound production by insects have been thoroughly studied, man-machine exploitation of such mechanisms has remained unreported. We therefore describe a method to modulate the frequency spectrum in the chirp call of a singing insect, Gampsocleis gratiosa (Orthoptera: Tettigoniidae), a large katydid indigenous to China and commonly known as Guo Guo or Chinese Bush Cricket. The chirp modulation was achieved through the contact of a ribbon of Ionic Polymer-Metal Composite (IPMC) against wing of the insect. The IPMC effectively served as an actuator when a small DC voltage was applied to the ribbon’s faces. By applying a sequential on/off voltage waveform to the IPMC ribbon, the katydid’s chirp was modulated in a corresponding manner. This configuration can be used as part of a broader application of using singing insects to harness their acoustic power to produce and propagate machine-induced messages into the acoustic environment.


memory technology design and testing | 1999

Unbalanced cache systems

David L. Rhodes; Wayne H. Wolf

The new concept of an unbalanced, hierarchically-divided cache memory system is introduced and analyzed. This approach generalizes existing cache structures by allowing different memory references (e.g. as possibly unevenly divided within an address-space) to be subject to various levels of caching as well as varied amounts of cache at each level. Under the assumption that the total cache size at a particular level is fixed, it is easily shown that at least one divided cache structure exists for which the miss-rate is the same as a single unified cache. By using alternate implementations, however, the method may provide a significant decrease in miss-rates as is shown via simulations. Specifically, SPEC95 benchmarks are used to demonstrate that the technique is effective for general usage but it may be even more useful for embedded systems where memory access patterns can be more fully controlled (i.e. via the compiler). In addition to improved miss-rates, another advantage is that the hit-time for multiple smaller caches may be smaller than for a single larger cache. Disadvantageous, but readily surmountable, electrical aspects are also discussed.


International Journal of Foundations of Computer Science | 2001

TWO CONP-COMPLETE SCHEDULE ANALYSIS PROBLEMS

David L. Rhodes; Wayne H. Wolf

While many forms of schedule decision problems are known to be NP-complete, two forms of schedule analysis problems are shown to be coNP-complete in the strong sense. Each of these involve guaranteeing that all deadlines are met for a set of task-graphs in statically-mapped, priority-based, multiprocessor schedules given particular variabilities. Specifically, the first of these allows run-times which axe bracketed, where the actual run-time of some tasks can take on any value within a given range. The second deals with task-graphs which arrive asynchronously, that is where the release-time for each task-graphs may take either any or a bracketed value. These variations correspond to task-graphs with either release-time or run-time jitter. The results are robust in the sense that they apply when schedules are either preemptive or non-preemptive as well as for several other problem variations.


arftg microwave measurement conference | 1984

PLANA/2.1-Enhanced Control Software for Network Analyzer Systems

Benjamin Epstein; Jonathan Schepps; David L. Rhodes

PLANA/2.1 is an extensive software package for controlling the HP-8409 network analyzer. PLANA has been updated to allow on-line statistical analyses of data and operation with mm-wave test sets. A version of PLANA that controls the HP-8510 network analyzer will appear in the near future.

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Wayne H. Wolf

Georgia Institute of Technology

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Alan C. Samuels

Edgewood Chemical Biological Center

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Harry Salem

Stevens Institute of Technology

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James O. Jensen

Edgewood Chemical Biological Center

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Thomas Koscica

Stevens Institute of Technology

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William R. Loerop

Stevens Institute of Technology

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