David L. Standley

Analog VLSI systems for image acquisition and fast early vision processing

This article describes a project to design and build prototype analog early vision systems that are remarkably low-power, small, and fast. Three chips are described in detail. A continuous-time CMOS imager and processor chip uses a fully parallel 2-D resistive grid to find an objects position and orientation at 5000 frames/second, using only 30 milliwatts of power. A CMOS/CCD imager and processor chip does high-speed image smoothing and segmentation in a clocked, fully parallel 2-D array. And a chip that merges imperfect depth and slope data to produce an accurate depth map is under development in switched-capacitor CMOS technology.

Criteria for robust stability in a class of lateral inhibition networks coupled through resistive grids

In the analog VLSI implementation of neural systems, it is sometimes convenient to build lateral inhibition networks by using a locally connected on-chip resistive grid to interconnect active elements. A serious problem of unwanted spontaneous oscillation often arises with these circuits and renders them unusable in practice. This paper reports on criteria that guarantee these and certain other systems will be stable, even though the values of designed elements in the resistive grid may be imprecise and the location and values of parasitic elements may be unknown. The method is based on a rigorous, somewhat novel mathematical analysis using Tellegens theorem (Penfield et al. 1970) from electrical circuits and the idea of a Popov multiplier (Vidyasagar 1978; Desoer and Vidya sagar 1975) from control theory. The criteria are local in that no overall analysis of the interconnected system is required for their use, empirical in that they involve only measurable frequency response data on the individual cells, and robust in that they are insensitive to network topology and to unmodelled parasitic resistances and capacitances in the interconnect network. Certain results are robust in the additional sense that specified nonlinear elements in the grid do not affect the stability criteria. The results are designed to be applicable, with further development, to complex and incompletely modeled living neural systems.

Circuit design criteria for stable lateral inhibition neural networks

The authors report a design approach that guarantees that lateral inhibition neural networks will be stable, even though the values of designed elements in the resistive grid may be imprecise and the location and values of parasitic elements may be unknown. The method is based on a rigorous, somewhat novel mathematical analysis using Tellegens theorem and the idea of Popov multipliers from control theory. It is thoroughly practical because the criteria are local in the sense that no overall analysis of the interconnected system is required, empirical in the sense that they involve only measurable frequency response data on the individual cells, and robust in the sense that unmodeled parasitic resistances and capacitances in the interconnect network cannot affect the analysis.<<ETX>>

Analog VLSI systems for early vision processing

Describes a project to design and build prototype analog early vision systems to determine how the advantages of analog VLSI, high speed, low power, and small area, can be exploited and its disadvantages, limited accuracy, inflexibility, lack of storage capacity, and long design times, can be minimized. This project explored three distinct circuit design styles for vision applications, continuous-time processing, charge-coupled devices, and switched capacitors. The overall effort and three chips are described.<<ETX>>

Design criteria extensions for stable lateral inhibition networks in the presence of circuit parasitics

In the analog VLSI implementation of neural systems, it is sometimes convenient to build lateral inhibition networks by using a locally connected on-chip resistive grid. A serious problem of unwanted spontaneous oscillation often rises with these circuits and renders them unusable in practice. A report is presented on extensions of earlier work on circuit design criteria for stability in this type of network. The criteria are local in the sense that no overall analysis of the interconnected system is required for their use, empirical in the sense that they involve only measurable frequency response data on individual cells, and robust in the sense that they are not affected by unmodeled parasitic resistances and capacitances in the grid. The method is based on Tellegens theorem (from circuit theory) and the multiplier concept (from control theory).<<ETX>>

Small, fast analog VLSI systems for early vision processing

Describes a project to design and build prototype analog early vision systems that are remarkably low power, small, and fast. This paper briefly outlines the overall effort and describes three chips in some detail.<<ETX>>

Stability in a class of resistive grid networks containing active device realizations of nonlinear resistors

In the analog VLSI implementation of neural systems, it is sometimes convenient to build networks by using a locally connected on-chip resistive grid. A problem of unwanted spontaneous oscillation often arises with these circuits and renders them unusable in practice. Recent work on design criteria for such networks considers the stability of a circuit class consisting of nonlinear resistors, nonlinear capacitors, and linear driving-point impedances, all of which are two-terminal elements. This study, which is an extension of earlier work, allows a more general dynamic element to be included in the network. The new element class allows modeling of the dynamics of nonlinear resistors realized with transistors; this is useful where memoryless I-V characteristic modeling is not appropriate. The extended criteria are local in the sense that no global analysis of the network is needed, and robust in the sense that unmodeled parasitic resistance and capacitance in the resistive grid do not affect the stability result.<<ETX>>