Debashis Panigrahi

Battery-Driven System Design: A New Frontier in Low Power Design

As an increasing number of electronic systems are powered by batteries, battery life becomes a primary design consideration. Maximizing battery life requires system designers to develop an understanding of the capabilities and limitations of the batteries that power such systems, and to incorporate battery considerations into the system design process. Recent research has shown that the amount of energy that can be supplied by a given battery varies significantly, depending on how the energy is drawn. Consequently, researchers are attempting to develop new battery-driven approaches to system design, which deliver battery life improvements over and beyond what can be achieved through conventional low-power design techniques. This paper presents an introduction to this emerging area, surveys promising technologies that have been developed for battery modeling and battery-efficient system design, and outlines emerging industry standards for smart battery systems.

Battery life estimation of mobile embedded systems

Since battery life directly impacts the extent and duration of mobility, one of the key considerations in the design of a mobile embedded system should be to maximize the energy delivered by the battery, and hence the battery lifetime. To facilitate exploration of alternative implementations for a mobile embedded system, in this paper we address the issue of developing a fast and accurate battery model, and providing a framework for battery life estimation of Hardware/Software (HW/SW) embedded systems. We introduce a stochastic model of a battery, which can simultaneously model two key phenomena affecting the battery life and the amount of energy that can be delivered by the battery: the rate capacity effect and the recovery effect. We model the battery behavior mathematically in terms of parameters that can be related to physical characteristics of the electro-chemical cell. We show how this model can be used for battery life estimation of a HW/SW embedded system, by calculating battery discharge demand waveforms using a power co-estimation technique. Based on the discharge demand, the battery model estimates the battery lifetime as well as the delivered energy. Application of the battery life estimation methodology to three system implementations of an example TCP/IP network interface subsystem demonstrates that different system architectures can have significantly different delivered energy and battery lifetimes.

Quality of service provisioning in 802.11e networks: challenges, approaches, and future directions

In order to support diverse application requirements, a new standard called IEEE 802.11e is being proposed to improve quality of service in wireless LAN networks. There are, however, a few remaining challenges that need to be addressed in order to enable comprehensive QoS support using 802.11e. In this article we provide an overview of a few of these challenges, describe their possible impact on QoS, and provide a survey of techniques that potentially could be used to address the identified challenges. Specifically, we focus on three challenges: handling time-varying network conditions, adapting to varying application profiles, and managing link layer resources. Additionally, we present several potential future directions toward improved QoS in wireless networks.

Data aware, low cost error correction for wireless sensor networks

One or the main challenges in adoption and deployment of wireless networked sensing applications is ensuring reliable sensor data collection and aggregation, while satisfying the low-cost, low-energy operating constraints of such applications. A wireless sensor network is inherently vulnerable to different sources of unreliability resulting in transient failures. Existing reliability techniques that address transient failures in circuits and communication channels incur prohibitively high energy, bandwidth and cost overheads in the sensor nodes. In this paper we investigate application-level error correction techniques for sensor networks that exploit the properties of sensor data to eliminate any overhead on the sensor nodes, at the expense of nominal buffer requirements at the data aggregator nodes, which are much less cost/energy constrained. Our approach involves use of spatio-temporal correlations in sensor data, the goals of the application, and its vulnerability to various errors. We present our error-correction algorithm and evaluate it through simulations using real and synthetic sensor data. Experimental results validate the feasibility of our approach to provide high degree of reliability in sensor data aggregation, without imposing overheads on sensor nodes.

Model based error correction for wireless sensor networks

One of the main challenges in wireless sensor networks is to provide low-cost, low-energy reliable data collection. Reliability against transient errors in sensor data can be provided using the model-based error correction described in (S. Mukhopadhyay et al., Mar. 2004), in which temporal correlation in the data is used to correct errors without any overheads at the sensor nodes. In the above work it is assumed that a perfect model of the data is available. However, as variations in the physical process are context-dependent and time-varying in a real sensor network, it is infeasible to have an accurate model of the data properties a priori, thus leading to reduced correction efficiency. In this paper, we address this issue by presenting a scalable methodology for improving the accuracy of data modeling through on-line estimation and model updates. Additionally, we propose enhancements to the data correction algorithm to incorporate robustness against dynamic model changes and potential modeling errors. We evaluate our system through simulations using real sensor data collected from different sources. Experimental results demonstrate that the proposed enhancements lead to an improvement of up to a factor of 10 over the earlier approach.

Using a soft core in a SoC design: experiences with picoJava

Through our experience in synthesis, validation, test, and integration of the picoJava processor core in a system-on-chip (SoC) design we point out the challenges faced and issues to address in efficient reuse of a soft core.

Energy/Latency/Image Quality Tradeoffs in Enabling Mobile Multimedia Communication

Future wireless applications, such as cellular video telephony, wireless LANs and PANs, home networks, and sensor networks, point towards a growing demand for multimedia content in wireless communication. However, mobile multimedia communication has several bottlenecks including bandwidth requirements, low-power constraints, and channel noise. In this paper, we propose a method to overcome the energy and bandwidth bottlenecks by adapting to the varying conditions and requirements of mobile multimedia communication. We focus on source coding, which can have significant impact on both the computation and communication energy consumption of the multimedia radio, as well as the Quality of Multimedia Data transmitted and the Quality of Service (latency of transmission) achieved. In particular, we study the effect of varying some parameters of the JPEG image compression algorithm (a type of source coding) on energy, latency, and image quality. We present a methodology to enable selection of the appropriate image compression parameters to implement the energy/latency/image quality tradeoff in mobile multimedia radios.

Dynamic adaptation policies to improve quality of service of real-time multimedia applications in IEEE 802.11e WLAN networks

With the increased popularity of wireless broadband networks and the growing demand for multimedia applications, such as streaming video and teleconferencing, there is a need to support diverse multimedia services over the wireless medium. In order to efficiently address these diverse needs, efforts have been pursued to provide Quality of Service (QoS) mechanisms for medium access, resulting in a standard called IEEE 802.11e. One of the enhancements proposed in IEEE 802.11e is a polling-based access mechanism, which is targeted for real-time multimedia flows. In this polling-based scheme, scheduling and time allocation are based on flow reservations. Hence, the effectiveness of the mechanism is heavily dependent on the accuracy of the flow requirements in the reservation. Flow requirements, however, can vary over time and an allocation based on fixed reservations cannot address this variability. This limitation, which is present in the reference scheduler of IEEE 802.11e, leads to degraded multimedia quality for flows with variable requirements, even when channel resources are available.In order to address the above limitation, we present an adaptation framework that dynamically adjusts the polling-based access mechanism and associates flows to different modes of access (polling-based/contention-based), according to the current needs of the application, as opposed to solely relying on the reservation parameters. We demonstrate that with our adaptation, the achieved QoS for real-time multimedia streams, in terms of delay and throughput metrics, can be significantly improved compared to other known mechanisms. Additionally, we show the benefits of our adaptation framework on overall multimedia quality and system capacity.

Interface based hardware/software validation of a system-on-chip

The availability of reusable IP-cores, increasing time-to-market and design productivity gap, and enabling deep sub-micron technologies have led to core-based system-on-chip (SoC) design as a new paradigm in electronic system design. Validation of these complex hardware/software systems is the most time consuming task in the design flow. In this paper, we focus on developing an efficient interface-based validation methodology for core-based SoC designs. In SoCs designed with pre-validated IP cores, the verification complexity can be significantly alleviated by concentrating on the integration of the cores in the system, rather than the complete SoC. In this paper, we investigate typical interface problems that arise in integrating cores in an SoC, and classify these problems into different categories. Based on the classification of these interface problems, we introduce an interface-based validation methodology. Finally, we demonstrate the effectiveness of the proposed methodology using an example image compression SoC that we are developing.

A Hardware/Software Reconfigurable Architecture for Adaptive Wireless Image Communication

With the projected significant growth in mobile internet and multimedia services, there is a strong demand for next-generation appliances capable of wireless image communication. One of the major bottlenecks in enabling wireless image communication is the high energy requirement, which may surpass the current and future capabilities of battery technologies. Past studies have shown that the bottlenecks can be overcome by developing adaptive multimedia compression algorithms which can adapt to dynamic channel conditions and service requirements. We present an application-specific hardware/software reconfigurable architecture to support adaptive image compression algorithms. We present a design methodology which considers co-design between adaptive algorithms and architectural design leading to a reconfigurable architecture for image compression algorithms. Codesign of the proposed architecture aims not only at performance and power efficient implementation, but also towards fast and efficient run-time adaptation of an adaptive image compression algorithm.