Deepak Prasad
Birla Institute of Technology, Mesra
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Publication
Featured researches published by Deepak Prasad.
Archive | 2018
Namrata Yadav; Deepak Prasad; Vijay Nath; Manish Kumar
In this research article, a 1.5-GHz low-noise amplifier and down-conversion double-balanced mixer have been designed for CMOS RF front receiver. It plays a vital role in Global Positioning System (GPS) for increasing the safety and efficiency of flight. Gilbert down-conversion topology has been adopted for the design of mixer, while single-differential topology with matching network has been implemented for low-noise amplifier. The conversion gain of the mixer is 16 dB, noise figure is 12 dB, IIP3 is −5.66 dBm, and 1-dB compression point is 1.369 dBm. The designed circuit is tested at 1.5 V, and the simulation has been carried out with the help of cadence analog design environment with UMC 90 nm technology.
International Journal of Drug Delivery | 2017
Sahil Kumar; Alka Sharma; Rajesh K. Singh; Deepak Prasad; Tilak Raj Bhardwaj
The present study pertains to the delivery of antimalarial drug (Lumifantrine). In this, polyphosphazene has been used in the synthesis of polyphosphazene-linked conjugates of Lumifantrine. These polymer-linked Conjugates have been synthesized and characterized by modern analytical techniques. The in-vitro drug release of Lumifantrine drug conjugates: p -Amino benzoic acid ester substituted polyphosphazene drug conjugate (15) and Glycine methyl ester substituted polyphosphazene drug conjugate (21) have been found to be 6.00 % and 5.96% (pH 1.2), 88.52% and 79.86% (pH 7.4), respectively. These drug conjugate may prove an effective delivery system for the treatment of malaria.
Archive | 2019
Sanjay Kumar; Ayushman Khalkho; Sparsh Agarwal; Suraj Prakash; Deepak Prasad; Vijay Nath
With continuously increasing the use of energy and growth in population, conservation of energy is very much needed. Remote access to electronic appliances can solve the problem. Instructions can be given to these systems through a web or an android application. Some of the technologies which are used can be GSM, ZigBee, Wi-Fi, and Bluetooth, along with different controlling devices. This paper gives a survey of all those systems which have already been used in various different applications.
Archive | 2019
Varun Bohra; Neha Nidhi; Sumit Singh; Deepak Prasad; Anand Kr. Thakur; Ajay Kumar; Vijay Nath
This paper presents an overview of a reaction timer having an accuracy up to two decimal places (which is extendable). Three decade counters constitute the circuitry of this reaction timer wherein each of the decade counters is connected to four master–slave J-K flip-flops to form a sequential circuit. A delay signal is also introduced at the input so that the output is genuine. The whole simulation process is carried out in Cadence virtuoso analog and digital design environment of gpdk045 nm CMOS technology at a supply voltage of 1 V.
Archive | 2019
Varun Bohra; Deepak Prasad; Neha Nidhi; Anup Tiwari; Vijay Nath
This paper expresses an overview of the design strategy of smart toll and billing collection system. Nowadays, due to an improved transportation infrastructure, a huge rush can be seen at the toll plazas in order to pay the toll taxes. Hence, an effective model for automation in toll tax payment is being designed so that the traffic at these toll plazas can be reduced. The so-called model uses a combination of an image capturing device with high-resolution processor which would not only reduce the monetary loss due to faults in manual operation but also save the time of the riders. The objective of the project is to design a layout which automatically identifies approaching vehicles, records the data related to the vehicles, and generates an appropriate toll bill which can be paid either in cash or using e-wallets, plastic money, or by providing a system for automatic deduction of the amount from a predefined user account. This vision when implemented would help to reduce traffic congestion at toll plazas and decrease the fuel consumption of vehicles waiting in the queue.
Archive | 2019
Neha Nidhi; Deepak Prasad; Vijay Nath
This paper discusses the design and analysis of two-stage CMOS operational amplifier. This design is operated at the supply of 1.5 V in 90 nm CMOS technology. In this design, 75.17 dB open-loop gain is achieved and having 7.73 MHz unity gain bandwidth and 148.8 m degree phase margin. This circuit has 10 pF capacitive load with 0.14 nW average power dissipation and slew rate is 0.25 V/μs. This proposed circuit is designed and simulated in cadence UMC 90 nm technology.
Archive | 2019
Sumit Singh; Deepak Prasad; Vijay Nath
This paper demonstrates the design of a wideband low-noise amplifier for WIMAX application, which is ranging frequency band from 2 to 6 GHz. This proposed low-noise amplifier achieved a higher gain and low noise figure. A wideband input and output impedance matching has been achieved by using reactive elements at input and output of the LNA. Two number of cascode common source amplifiers have been used to achieve a wider bandwidth. Circuit designing and simulation are carried out in Cadence Virtuoso gpdk45 nm CMOS technology. As the simulation results show, the LNA achieved a gain of 45-37 dB, noise figure of 1.1–1.9 dB and 1 dB compression point of −12.12 dB for entire bandwidth. This LNA circuit drew 70.88 MW power from 1.5 V power supply.
Archive | 2019
Abhishek Pandey; Deepak Prasad; Vijay Nath
This paper demonstrates a component of radio frequency transmitter called up-conversion mixer with high conversion gain and ameliorate linearity. The novelty of given circuit architecture is that CMOS transconductance amplifier is used to improve the overall conversion gain. For changing to an unbalanced baseband signal (UBBBS) to differential balanced signal (DBS), a passive balun circuit has been used. The circuit operates at frequency 2.4 GHz, and the local oscillator frequency is 2.3 GHz. The conversion gain and IIP3 of the proposed circuit has been achieved 21.4 dB and 4.24 dBm respectively. The proposed circuit is designed and simulated using Cadence Analog and Digital System Design Tools with PDK UMC90 nm CMOS Technology. This circuit is operational on the rail-to-rail power supply of ±1.8 V.
Archive | 2019
Vidushi Goel; Riya; Pinki Kumari; Prachi Shikha; Tanushree; Deepak Prasad; Vijay Nath
The paper is designed to develop a robot for stocking shelves, using Arduino UNO, Android, and RFID technology. This robot can grab items off a shelf and put them back again using information obtained from RFID cards and RFID card readers. According to the gesture commands received from Android, the movements of the robot are controlled. Gestures are captured through the Android smartphone. The Bluetooth modules are controlled by the microcontroller.
Archive | 2019
Deepak Prasad; Vijay Nath
Temperature has been one of the key parameters used in almost every field. The evolution of temperature sensor is highly appreciated by industrial process control, automotive industry, aerospace, well logging, power generation, etc. In other words, it can be said that measuring high temperature is now one of the key enabling technologies of the current century. Development in temperature sensor technologies not only allows increases in accuracy, control, efficiency, and reliability in safety-critical systems operating in harsh environments in many applications but also decrease the causality ratio in human–machine interface. The change in trend occurs with the evolution of CMOS which puts the storm in the field of electronics where a large circuit can be supposed to work at very low power supply. The present paper reviews the various technologies available to measure temperature.
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North Eastern Regional Institute of Science and Technology
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