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Featured researches published by Dennis Yost.


Solid State Phenomena | 2005

Using megasonics for particle and residue removal in single wafer cleaning

Steven Verhaverbeke; Roman Gouk; Dennis Yost

Introduction With smaller device geometries, the number of cleaning steps increases and is reaching >100 steps in some recent process flows. Increasing the number of cleaning cycles contributes to additional cycle time, cumulative silicon and oxide loss, and damage to fragile structures. Therefore, a shorter, more efficient cleaning process is critical to achieving high-productivity device manufacturing. In a conventional wet bench, the megasonics crystals typically are mounted on the bottom of the tank, and their energy is dispersed over 50-100 wafers. In a single-wafer horizontal spin system, the acoustic energy can be focused uniformly over a wafer. In single wafer cleaning, effectiveness of megasonics is typically the most critical part of process reliability because of the short cycle time. This requires that all causes and effects in the megasonic process are well understood. In this work we have attempted to test the mechanism of cavitation and its role in particle removal in a single wafer system. Tests described in this paper were conducted using a single wafer process chamber with full coverage, 300 mm megasonic transducer, which operates in parallel to the processing wafer. The effect of DI water gas content on particle removal was studied.


Solid State Phenomena | 2005

Aqueous Based Single Wafer Cu/Low-k Cleaning Process Characterization and Integration into Dual Damascene Process Flow

Jian She Tang; Brian J. Brown; Steven Verhaverbeke; Han Wen Chen; Jim Papanu; Raymond Hung; Cathy Cai; Dennis Yost

As device features scale down to 90nm and Cu/low-k films are employed for back end interconnects, post etch and ash residue cleaning becomes increasingly challenging due to the higher aspect ratio of the features, tighter CD control requirements, sensitivity of the low-k films, and the requirement for high wet etch selectivity between CuxO and Cu. Traditional solvent based cleaning in wet benches has additional issues such as wafer cross-contamination and high disposal cost [1, 2]. We have developed a novel aqueous solution (AQ) based single wafer cleaning process to address these challenges. The results of physical characterization, process integration electrical data, and process integration reliability data such as electromigration (EM) and stress migration data are presented. The main conclusions can be summarized as follows: (1) The single wafer cleaning process developed on the Oasis™ system can clean post etch residues and simultaneously clean the wafer front side and backside metallic contaminants; (2) In terms CuxO and Cu wet etch selectivity, CD loss control, the Oasis™ aqueous single wafer clean process is superior to the bench solvent cleaning process; (3)The Oasis aqueous cleaning process shows no undercut below etchstop due to the very low Cu etch amount in one cleaning pass, therefore the electromigration and stress migration performance of the aqueous Oasis processed wafers is clearly better than that of the solvent bench processed wafers.


Archive | 2001

Integrated low K dielectrics and etch stops

Claes Bjorkman; Min Melissa Yu; Hongquing Shan; David Cheung; Wai-Fan Yau; Kuo-Wei Liu; Nasreen Gazala Chapra; Gerald Zheyao Yin; Farhad Moghadam; Judy H. Huang; Dennis Yost; Betty Tang; Yunsang Kim


Archive | 2004

Cleaning submicron structures on a semiconductor wafer surface

Steven Verhaverbeke; Jianshe Tang; Roman Gouk; Brian J. Brown; Han-Wen Chen; Ching-Hwa Weng; James S. Papanu; Dennis Yost


Archive | 2000

Method of depositing and etching dielectric layers

Claes Bjorkman; David Cheung; Nasreen Gazala Chopra; Judy H. Huang; Yunsang Kim; Kuo-Wei Liu; Yu Melissa Min; Farhad Moghadam; Hongqing Shan; Sum-Yee Betty Tang; Wai-Fan Yau; Gerald Zheyao Yin; Dennis Yost


Archive | 2004

Early detection of metal wiring reliability using a noise spectrum

Michael C. Smayling; Dennis Yost


Archive | 2005

Integrated circuit fabricating techniques employing sacrificial liners

Mehul Naik; Srinivas Gandikota; Girish Dixit; Dennis Yost


Archive | 2000

Integrated low-k dielectric and etching stop layer

Claes Bjorkman; David Cheung; Nasreen Chopra; Judy H. Huang; Yunsang Kim; Kuo-Wei Liu; Yu Melissa Min; Farhad Moghadam; Hongqing Shan; Sum-Yee Betty Tang; Wai-Fan Yau; Gerald Zheyao Yin; Dennis Yost; ヨー ウェイ−ファン; リュー クオ−ウェイ; エイチ. ブジョルクマン クラエス; ベティ タン サム−イー; ゼヤオ イン ジェラルド; エイチ. フアン ジュディ; ダブリュー. チェン デイヴィッド; ジェイ. ヨスト デニス; ガザラ チョップラ ナスリーン; モグハダム ファルハド; シャン ホンキン; メリッサ ミン ユー; キム ユンサン


Archive | 2007

Method and apparatus for single-substrate cleaning

Alexander Sou-Kang Ko; Jianshe Tang; Brian J. Brown; Richard R. Endo; Steven Verhaverbeke; Cole Franklin; Dennis Yost; Runzi Chang


Archive | 2004

Method and apparatus for capturing and using design intent in an integrated circuit fabrication process

John H. Madok; Dennis Yost; Robin Cheung

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