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Derek T. Bachand

Intel

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Publication

Featured researches published by Derek T. Bachand.

Archive | 2000

PRIORITIZED BUS REQUEST SCHEDULING MECHANISM FOR PROCESSING DEVICES

David L. Hill; Derek T. Bachand

Archive | 2002

External bus transaction scheduling system

David L. Hill; Paul Breuder; Robert J. Greiner; Derek T. Bachand

Archive | 2003

Snoop blocking for cache coherency

Derek T. Bachand; Paul Breuder; Matthew A. Fisch

Archive | 1998

Avoiding tag compares during writes in multi-level cache hierarchy

Gururaj Shamanna; Chih-Hung Chung; Derek T. Bachand

Archive | 1997

Transaction stall technique to prevent livelock in multiple-processor systems

David L. Hill; Chinna Prudvi; Derek T. Bachand; Paul Breuder; Matthew A. Fisch

Archive | 2000

Dynamic priority external transaction system

David L. Hill; Derek T. Bachand; Chinna Prudvi; Deborah T. Marr

Archive | 1997

Prefetch queue responsive to read request sequences

Robert J. Greiner; David L. Hill; Chinna Prudvi; Derek T. Bachand; Matthew A. Fisch

Archive | 2002

Method and apparatus for altering data length to zero to maintain cache coherency

Paul Breuder; Derek T. Bachand; David L. Hill; Chinna Prudvi

Archive | 1997

Read line buffer and signaling protocol for processor

David L. Hill; Chinna Prudvi; Derek T. Bachand; Matthew A. Fisch

Archive | 2009

Communicating Via An In-Die Interconnect

David L. Hill; Robert J. Greiner; Tim Frodsham; Derek T. Bachand; Anant Deval; Mark Waggoner

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Collaboration

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David L. Hill

Intel

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Chinna Prudvi

Intel

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Deborah T. Marr

Intel

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Paul Breuder

Intel

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Matthew A. Fisch

Intel

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Robert J. Greiner

Intel

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Anant Deval

Intel

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Buderya S. Acharya

Intel

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Chih-Hung Chung

Intel

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Ganesh Kumar

Intel

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