Dimitri Stoppel

Multifinger Indium Phosphide Double-Heterostructure Transistor Circuit Technology With Integrated Diamond Heat Sink Layer

The RF power output of scaled subterahertz and terahertz indium phosphide double-heterostructure bipolar transistors (InP DHBTs) is limited by the thermal device resistance, which increases with the geometrical frequency scaling of these devices. We present a diamond thin-film heat sink process aimed at the efficient removal of the heat generated in submicrometer InP HBTs. The thin-film diamond is integrated in a wafer bond process. Vertical connections are facilitated by plasma-processed contact holes through the diamond layer, metallized with electroplated gold. The process is suitable for monolithic circuit integration, amenable to the realization of high-power analog circuits in the millimeter-wave region and beyond. The thermal resistance of double-finger transistors with a 0.8-μm emitter width could be reduced to 0.7 K/mW, while reaching the gain cutoff frequencies of fT = 360 GHz and fmax = 350 GHz. An integrated two-stage power amplifier with four-way power combining fabricated in this technology exhibited 20-dBm power output at 90 GHz with a bandwidth of 10 GHz.

Manufacturable Low-Cost Flip-Chip Mounting Technology for 300–500-GHz Assemblies

We developed a chip mounting technology suitable for low-cost assemblies in the 300–500-GHz frequency range, compatible with standard chip and submount fabrication techniques. The waveguide and transition designs are compatible with indium phosphide heterobipolar transistor millimeter-wave monolithic integrated circuit chip architecture. Increased conductor shielding in different multilayer thin-film waveguide topologies is applied to suppress radiative losses, enabling low-loss interconnects up to 500-GHz bandwidth. Standard flip-chip align-and-place equipment is used to assemble the chips onto submounts. Losses are evaluated by banded

Process robustness and reproducibility of sub-mm wave flip-chip interconnect assembly

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SciFab –a wafer‐level heterointegrated InP DHBT/SiGe BiCMOS foundry process for mm‐wave applications

-parameter measurements between 10 MHz and 500 GHz. For an optimized stripline-to-stripline transition, an insertion loss of less than 1 dB was measured at 500 GHz.

Benzocyclobutene dry etch with minimized byproduct redeposition for application in an InP DHBT process

The design margins for sub-mm-wave flip-chip transitions in three different topologies, coplanar-to-coplanar, stripline-to-coplanar, and stripline-to-stripline, were verified with the realization and S-parameter measurement of passive chip assemblies, which contain the same wiring architecture as our InP DHBT circuit integration. High yield was observed, and less than 2 dB insertion loss per transition was measured above 300 GHz on the stripline-to-stripline design.