Dnyanesh Chandrakant Tamboli

Investigating the Compatibility of Ruthenium Liners with Copper Interconnects

Ruthenium is proposed as an alternative liner material in sub 30-nm line-width device technology. Ruthenium is a noble metal and does not oxidize readily. Hence, it is possible to directly plate copper on ruthenium. Because of very low solubility of copper in ruthenium, ruthenium also offers good barrier properties. However, the same noble electrochemical characteristics that prevent the oxidation of ruthenium and so useful for being able to directly plate copper provides challenges in terms of corrosion of copper lines in subsequent wet processing. Copper is electrochemically active to ruthenium. As a result of which, in a galvanic couple with ruthenium copper corrosion will be accelerated. In this paper we will examine the kinetics of galvanic corrosion using novel techniques of in-situ AFM analysis and demonstrate that through chemistry optimization, galvanic corrosion can be minimized.

STI Post CMP Cleaning Solution Development

Shallow Trench Isolation (STI) is the standard isolation method for fabrication of submicron CMOS devices. Ceria based slurries are often used for the chemical mechanical planarization (CMP) of STI structures. It is essential therefore, to clean the structure after the CMP process to remove the ceria and other organic residues, usually resulting from the slurry. In this paper, post CMP cleaning of STI wafers with a specially formulated clean solution has been discussed.