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Dive into the research topics where Donald Emil Waldecker is active.

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Featured researches published by Donald Emil Waldecker.


Archive | 1993

Method and system for single cycle dispatch of multiple instructions in a superscalar processor system

James Allan Kahle; Chin-Cheng Kau; David S. Levitan; Aubrey Deene Ogden; Ali A Poursepanj; Paul Kang-Guo Tu; Donald Emil Waldecker


Archive | 1985

Data processing system with a plurality of processors accessing a common bus to interleaved storage

Donald Emil Waldecker; Charles Gordon Wright


Archive | 1996

Method and system for selective serialization of instruction processing in a superscalar processor system

James Allan Kahle; Chin-Cheng Kau; Aubrey Deene Ogden; Ali A Poursepanj; Paul Kang-Guo Tu; Donald Emil Waldecker


Archive | 1993

Method and system for independently accessing intermediate storage buffers by a plurality of execution units in a superscalar processor system

Chin-Cheng Kau; Aubrey Deene Ogden; Donald Emil Waldecker


Archive | 1995

Method and system for indexing the assignment of intermediate storage buffers in a superscalar processor system

Chin-Cheng Kau; Aubrey Deene Ogden; Donald Emil Waldecker


Archive | 1994

Method and system for nonsequential instruction dispatch and execution in a superscalar processor system

James Allan Kahle; Donald Emil Waldecker


Archive | 1972

Data processor with reflect capability for shift operations

Richard Edward Nier; Donald Emil Waldecker


Archive | 1993

Method and system for enhanced instruction dispatch in a superscalar processor system utilizing independently accessed intermediate storage

James Allan Kahle; Chin-Cheng Kau; Aubrey Deene Ogden; Ali A Poursepanj; Paul Kang-Guo Tu; Donald Emil Waldecker


Archive | 1993

Method and system for tracking scalar instructions within a superscalar processor system.

James Allan Kahle; Donald Emil Waldecker


Archive | 1993

Verfahren und System zur Befehlszuteilung in einem superskalaren Prozessorsystem mit unabhängig zugänglichem Zwischenspeicher Method and system for instruction dispatch in a superscalar processor system with independently accessible latch

James Allan Kahle; Chin-Cheng Kau; Aubrey Deene Ogden; Ali A Poursepanj; Tu Paul Kang-Guo; Donald Emil Waldecker

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