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Dive into the research topics where Dong Kyun Sohn is active.

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Featured researches published by Dong Kyun Sohn.


Applied Physics Letters | 1998

Formation of CoTi barrier and increased thermal stability of CoSi2 film in Ti capped Co/Si(100) system

Dong Kyun Sohn; Ji-Soo Park; Byung Hak Lee; Jong-Uk Bae; Jeong Soo Byun; Jae Jeong Kim

We investigated the formation of CoSi2 for Ti capped Co on (100) Si substrate with emphasis on the Co–Ti interaction and its effect on thermal stability. A 15 nm thick Ti capping layer is shown to improve the interfacial roughness and thermal stability of CoSi2 film grown on Si substrate compared with TiN capping. The increased uniformity of silicide/Si(100) interface is speculated to result from retarded Co–Si reaction by the formation of CoTi binary phase. And the high thermal stability can be explained by the fact that the amount of Ti atoms in CoSi2 film for Ti capping is much higher than what is in TiN capping. It is likely that the surface Ti diffuses rapidly into CoSi2 grain boundaries and slows down the agglomeration process, thereby increasing thermal stability while Ti in TiN capping did not.


international electron devices meeting | 1998

High thermal stability and low junction leakage current of Ti capped Co salicide and its feasibility for high thermal budget CMOS devices

Dong Kyun Sohn; Ji-Soo Park; Byung Hak Lee; Jong-Uk Bae; Kyung Soo Oh; Seh Kwang Lee; Jeong Soo Byun; Jae Jeong Kim

A thermally stable cobalt salicide has been fabricated using Ti-capping Co/Si system. A Ti-capping layer is shown to improve the interfacial roughness and thermal stability of CoSi/sub 2/ film grown on Si substrate comparing with TiN-capping. It is attributed to high amount of Ti atoms in Co disilicide film, which slow down the agglomeration. According to the results of salicided gate and junction, Ti capped CoSi, had stable characteristics when the thermal budget increased up to 850/spl deg/C for 90 min. Therefore, Ti-capping Co salicide structure can be acceptable to fabricate DRAM and LOGIC-embedded DRAMs.


Journal of The Electrochemical Society | 2000

Effects of Ti‐Capping on Formation and Stability of Co Silicide. I. Solid Phase Reaction of Ti to Co/Si System

Dong Kyun Sohn; Ji-Soo Park; Jin Won Park

We have investigated the formation and thermal stability of Co silicide on Si using a Ti-cap. We propose that Ti retards the reaction between Co and the Si substrate and also prevents oxygen contamination. The Ti-capped CoSi 2 has a higher transformation temperature and thinner film thickness than TiN-capped CoSi 2 . A 15 nm thick Ti-cap provides a CoSi 2 layer with a more uniform interface and higher thermal stability compared to CoSi 2 layers with a TiN-cap. The increased uniformity of the silicide/Si interface results from the retarded Co-Si reaction, due to the formation of a CoTi binary phase. The high thermal stability can be explained by a Ti-stuffing model. From analysis of the depth profile, it is likely that surface Ti diffuses rapidly into the CoSi 2 grain boundaries and slows the agglomeration process, thereby increasing the thermal stability. As a result, Ti-capped Co silicide formed on a 0.15 μm wide polycrystalline Si gate shows a thermal budget limit as high as 900°C for 30 min. Based on the results of capacitance-voltage and time-dependent dielectric breakdown measurements, we can conclude that Ti-capped Co silicide is a candidate as a gate electrode for high thermai budget devices such as logic with embedded dynamic random access memory.


Journal of The Electrochemical Society | 1999

Reduction of Dichlorosiliane‐Based Tungsten Silicide Resistivity by Amorphization and Its Applicability as an Electrode

Jeong Soo Byun; Byung Hak Lee; Ji-Soo Park; Dong Kyun Sohn; Jeongeui Hong; Won‐Ju Cho; Sang Jun Choi; Jae Jeong Kim

The most common low-resistance, high-melting-point metallization material in current semiconductor devices is polycide, which is defined as a silicide over doped polycrystalline silicon (poly-Si). Due to its excellent thermal stability and fabrication compatibility, tungsten polycide (WSi x /poly-Si) gate and bit line interconnects are well established in very-large-scale integrated circuit (VLSI) applications. Studies have been reported on the chemical vapor deposition (CVD) of WSi x using SiH 4 and WF 6 or SiH 2 Cl 2 [dichlorosilane (DCS)] and WF 6 chemistries, which are termed the silane-based WSi x (SiH 4 -WSi x ) 1-4 and the DCS-based WSi x (DCS-WSi x ) process, 5-10 respectively. Recent work has shown that DCS-WSi x are of high quality with less particluates, better confirmality of step coverage, and lower fluorine incorporation in comparison with SiH 4 WSi x films. It is known that the higher deposition temperature of DCS-WSi x causes crystallization of the film during deposition to hexagonal close-packed WSi 2 , a low-temperature polymorphism of tungsten silicide (termed hcp-WSi 2 ). 11,12 Following thermal treat


international electron devices meeting | 1998

In-situ barrier formation for high reliable W/barrier/poly-Si gate using denudation of WN/sub x/ on polycrystalline Si

Byung Hak Lee; Dong Kyun Sohn; Ji-Soo Park; Chang Hee Han; Yun-Jun Huh; Jeong Soo Byun; Jae Jeong Kim

We found that rapid thermal annealing treatment of amorphous WN/sub x//poly-Si resulted in denudation of nitrogen atoms with formation of low resistivity W and high reliable in situ barrier layer, simultaneously. Furthermore, electrical properties of denuded-WN/sub x//poly-Si gate were superior to those of conventional W/WN/sub x//poly-Si gate after selective oxidation and post heat-treatment.


IEEE Transactions on Electron Devices | 2000

The effect of Co incorporation on electrical characteristics of n/sup +//p shallow junction formed by dopant implantation into CoSi/sub 2/ and anneal

Ji-Soo Park; Dong Kyun Sohn; Jong-Uk Bae; Chang Hee Han; Jin Won Park

The impact of Co incorporation on the electrical characteristics has been investigated in n/sup +//p junction formed by dopant implantation into CoSi/sub 2/ and drive-in anneal. The junctions were formed by As/sup +/ (30 or 40 keV, 1/spl times/10/sup 16/ cm/sup -2/) implantation into 35 nm-thick CoSi/sub 2/ followed by drive-in annealing at 900/spl deg/C for 30 s in an N/sub 2/ ambient. Deeper junction implanted by As/sup +/ at 40 keV was not influenced by the Co incorporation. However, for shallower junction implanted by As/sup +/ at 30 keV, incorporation of Co atoms increased its leakage current, which were supposed to be dissociated from the CoSi/sub 2/ layer by silicide agglomeration during annealing. The mechanism of such a high leakage current was found to be Poole-Frenkel barrier lowering induced by high density of Co traps.


Japanese Journal of Applied Physics | 2001

Increased Thermal Stability of W/Ta2O5 Gate Structure Using Effective Diffusion Barrier of Denuded Tungsten Nitride

Ihl Hyun Cho; Ji-Soo Park; Dong Kyun Sohn; Jae Hee Ha

We investigated the effect of TiN and WNx diffusion barrier on the thermal stability and electrical properties of W/Ta2O5 gate structure. For TiN/Ta2O5 system annealed at 950°C, both tantalum and oxygen in Ta2O5 films significantly migrated to TiN layer, resulting in the partial oxidation of TiN and the formation of voids in the Ta2O5 layers and increasing the roughness at the TiN/Ta2O5 interface. However, for the WNx/Ta2O5 system annealed even at 950°C, no outdiffusion of tantalum and oxygen from Ta2O5 into annealed-WNx layer was observed. A nitrogen-rich barrier with Ta–O–N bonding formed on Ta2O5 surface during denudation of WNx caused the high thermal stability of WNx/Ta2O5. The electrical characteristics of W/WNx/Ta2O5 system was found to be more superior than that of W/TiN/Ta2O5 in the respect of leakage current and breakdown voltage, thus it can be one of promising metal gate structures with high-dielectric in sub-100 nm metal-oxide semiconductor (MOS) devices.


Journal of The Electrochemical Society | 2000

Formation of CoSi2 on various polycrystalline silicon structures and its effects on thermal stability

Jong-Uk Bae; Dong Kyun Sohn; Ji-Soo Park; Chang Hee Han; Jin Won Park

We have investigated formation of CoSi 2 on various grain sizes of polycrystalline Si (poly-Si) with emphasis on its thermal stability. As the grain size of poly-Si decreases, CoSi 2 phase is formed at lower temperature because of the diffusion of Co atoms along grain boundaries of poly-Si during the rapid thermal annealing process. The enhanced reaction of cobalt with silicon on small-grain-sized poly-Si creates a rough CoSi 2 /poly-Si interface, which becomes thermally unstable. CoSi 2 formed on amorphous Si showed less thermal stability than that found on medium and large grain sized poly-Si.


Journal of The Electrochemical Society | 1999

Degradation of Reactively Sputtered Ti‐Si‐N Films Used as a Barrier Layer in Titanium Silicide/Polycrystalline Si Gate Electrodes

Ji-Soo Park; Dong Kyun Sohn; Byung Hak Lee; Jong-Uk Bae; Jeong Soo Byun; Jin Won Park

We have investigated the effects of barrier layers on the electrical characteristics of Ti-silicide/polycrystalline Si gates. Ti-Si-N films reactively sputtered using TiSi 2.1 target and TiN film were used as barrier layers. We found that the increase in nitrogen content of Ti-Si-N films results in the formation of Si 3 N 4 bonding and a small amount of TiN bonding. The effect of the Ti-Si-N barriers on Ti-silicide agglomeration and dopant loss into Ti-silicide is strongly influenced by the nitrogen content, indicating that larger amounts of Si 3 N 4 in the Ti-Si-N film improved barrier performance. However, TiN films are more effective barriers. In addition, Ti-Si-N barriers show more degraded gate-oxide reliability than TiN barriers, which is attributed to the incorporation of Ti atoms into polycrystalline Si. It is conjectured that free Ti atoms not bonded with Si or N in the Ti-Si-N films act as a source of Ti incorporation. TiN barriers not only inhibit Ti diffusion from Ti-silicide, but also do not provide a source of Ti.


Applied Physics Letters | 1998

Formation of epitaxial CoSi2 spike in Co/Si3N4/Si(100) system and its crystallographic structure

Ji-Soo Park; Dong Kyun Sohn; Yeong-Cheol Kim; Jong-Uk Bae; Byung Hak Lee; Jeong Soo Byun; Jae Jeong Kim

The formation of CoSi2 spike in the Co/Si3N4/Si(100) system and its crystallographic structure have been investigated. An annealing at 1050 °C caused not only agglomeration of Co film but penetration of Co agglomerates through the Si3N4 layer. The CoSi2 spike of B type epitaxial and twinned orientation of CoSi2[110]∥Si[110], Si(111)∥CoSi2(111) and Si(111)∥CoSi2(111) was formed in the Si substrate by the penetrated Co source. The formation of the epitaxial CoSi2 spike can be explained by the fast diffusion of Co atoms along defects in Si such as dislocations resulting from stress between the Si3N4 layer and the Si substrate.

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Ji-Soo Park

North Carolina State University

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Jae Jeong Kim

Seoul National University

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Yeong-Cheol Kim

Korea University of Technology and Education

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