Dong-Soo Lee

A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures

Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

Multi-level switching of triple-layered TaOx RRAM with excellent reliability for storage class memory

A highly reliable RRAM with multi-level cell (MLC) characteristics were fabricated using a triple-layer structure (base layer/oxygen exchange layer/barrier layer) for the storage class memory applications. A reproducible multi-level switching behaviour was successfully observed, and simulated by the modulated Schottky barrier model. Morevoer, a new programming algorithm was developed for more reliable and uniform MLC operation. As a result, more than 107 cycles of switching endurance and 10 years of data retention at 85°C for all the 2 bit/cell operation were archieved.

Highly Uniform Switching of Tantalum Embedded Amorphous Oxide Using Self-Compliance Bipolar Resistive Switching

A new approach of self-compliance bipolar switching of tantalum embedded amorphous oxide for highly reliable and uniform switching was investigated. Based on analytic results, the formation of a metallic tantalum embedded amorphous oxide film was confirmed. Robust characteristics of over cycles with no change at both resistance states under voltage pulses were achieved due to the self-compliance function, which originated from the limitation of current by metallic ohmic load resistance. In addition, an oxygen plasma pulse method for interface oxidation was demonstrated.

Modeling for multilevel switching in oxide-based bipolar resistive memory.

We report a physical model for multilevel switching in oxide-based bipolar resistive memory (ReRAM). To confirm the validity of the model, we conduct experiments with tantalum-oxide-based ReRAM of which multi-resistance levels are obtained by reset voltage modifications. It is also noticeable that, in addition to multilevel switching capability, the ReRAM exhibits extremely different switching timescales, i.e. of the order of 10(-7) s to 10(0) s, with regard to reset voltages of only a few volts difference which can be well explained by our model. It is demonstrated that with this simple model, multilevel switching behavior in oxide bipolar ReRAM can be described not only qualitatively but also quantitatively.

Highly-scalable threshold switching select device based on chaclogenide glasses for 3D nanoscaled memory arrays

We present here on a switch device made of a nitridized-chalcogenide glass for application in nanoscale array circuits. Previously, AsTeGeSi-based switches have had key issues with performance degradation over time. This is usually due to changes in the Te concentration in the device active region [1-3]. However, our AsTeGeSiN switches were able to overcome this limitation as well as scale down to 30 nm with an on current of 100 μA (J > 1.1×107A/cm2). Their cycling performance was shown to be greater than 108. Also, we demonstrate a memory cell using a TaOx resistance memory with the AsTeGeSiN select device.

Improved Resistive Switching Reliability in Graded NiO Multilayer for Resistive Nonvolatile Memory Devices

An alternative approach of controlling bistable resistance switching in NiO was investigated. By fabricating a multilayer structure of three NiOx layers with varying oxygen content, bistable resistance switching could be localized. By varying the enveloping oxygen partial pressure during NiOx layer deposition from 10% to 30%, improved resistance and switching voltage distribution from cycle to cycle was achieved. In addition, more localized switching could emulate sub-100-nm-sized cells showing decreased reset current values on the order of 100 A. X-ray photon spectroscopy analysis shows a clear grading near the interfaces of successive NiO layers.

Low-power log-MAP turbo decoding based on reduced metric memory access

Due to their powerful error correcting performance, turbo codes have been adopted in many wireless communication standards. Although several low-power techniques have been proposed, power consumption is still a major issue to be solved in practical implementations. Since turbo decoding is classified as a memory-intensive algorithm, reducing memory accesses is crucial to achieve a low power design. To reduce the number of memory accesses for maximum a posteriori (MAP) decoding, this paper proposes an approximate reverse calculation of backward metrics which can be implemented with simple computational complexity. Simulation results show that the proposed method, applied to the W-CDMA standard, reduces the access rate of the backward metric memory by 90% without degrading error correcting performance. A prototype turbo decoder based on the proposed reverse calculation achieves 30% power reduction compared to the conventional decoder.

Investigation for Resistive Switching by Controlling Overflow Current in Resistance Change Nonvolatile Memory

In recent years, resistance changes random access memory (RRAM) which shows reversible bistable resistance states by applied voltage has been studied as one of the alternatives of next-generation nonvolatile memory due to its excellent device characteristics including scalability, speed, and retention. Here, we report on the noncharge-based NiO RRAM device characteristics with load resistor as well as the simulation results of controlled conducting filament configuration. The RRAM device with load resistor showed super performances including highly reduction of switching current (~1 order) and significantly improved switching voltage distribution (30% reduction).

A Monte Carlo simulation for bipolar resistive memory switching in large band-gap oxides

A model that describes bilayered bipolar resistive random access memory (BL-ReRAM) switching in oxide with a large band gap is presented. It is shown that, owing to the large energy barrier between the electrode and thin oxide layer, the electronic conduction is dominated by trap-assisted tunneling. The model is composed of an atomic oxygen vacancy migration model and an electronic tunneling conduction model. We also show experimentally observed three-resistance-level switching in Ru/ZrO2/TaOx BL-ReRAM that can be explained by the two types of traps, i.e., shallow and deep traps in ZrO2.