U-In Chung

A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5−x/TaO2−x bilayer structures

Numerous candidates attempting to replace Si-based flash memory have failed for a variety of reasons over the years. Oxide-based resistance memory and the related memristor have succeeded in surpassing the specifications for a number of device requirements. However, a material or device structure that satisfies high-density, switching-speed, endurance, retention and most importantly power-consumption criteria has yet to be announced. In this work we demonstrate a TaO(x)-based asymmetric passive switching device with which we were able to localize resistance switching and satisfy all aforementioned requirements. In particular, the reduction of switching current drastically reduces power consumption and results in extreme cycling endurances of over 10(12). Along with the 10 ns switching times, this allows for possible applications to the working-memory space as well. Furthermore, by combining two such devices each with an intrinsic Schottky barrier we eliminate any need for a discrete transistor or diode in solving issues of stray leakage current paths in high-density crossbar arrays.

Electrical observations of filamentary conductions for the resistive memory switching in NiO films

Experimental results on the bistable resistive memory switching in submicron sized NiO memory cells are presented. By using a current-bias method, intermediate resistance states and anomalous resistance fluctuations between resistance states are observed during the resistive transition from high resistance state to low resistance state. They are interpreted to be associated with filamentary conducting paths with their formation and rupture for the memory switching origin in NiO. The experimental results are discussed on the basis of filamentary conductions in consideration of local Joule heating effect.

A novel cell technology using N-doped GeSbTe films for phase change RAM

The Ge/sub 2/Sb/sub 2/Te/sub 5/ (GST) thin film is well known to play a critical role in PRAM (Phase Change Random Access Memory). Through device simulation, we found that high-resistive GST is indispensable to minimize the writing current of PRAM. For the first time, we tried to increase the GST resistivity by doping nitrogen. Doping nitrogen to GST successfully reduced writing current. Also, the cell endurance has been enhanced with grain growth suppression effect of dopant nitrogen.

Highly Stretchable Resistive Pressure Sensors Using a Conductive Elastomeric Composite on a Micropyramid Array

A stretchable resistive pressure sensor is achieved by coating a compressible substrate with a highly stretchable electrode. The substrate contains an array of microscale pyramidal features, and the electrode comprises a polymer composite. When the pressure-induced geometrical change experienced by the electrode is maximized at 40% elongation, a sensitivity of 10.3 kPa(-1) is achieved.

Multi-layer cross-point binary oxide resistive memory (OxRRAM) for post-NAND storage application

Feasibility of the multi-layer cross-point structured binary oxide resistive memory (OxRRAM) has been tested for next generation non-volatile random access high density data storage application. Novel plug contact type bottom electrode (plug-BE) could reduce active memory cell diameter down to 50nm with smaller operation current and improved switching distributions. With 2 additional masks, one layer of plug-BE included cross-point memory array could be added on top of another one. No signal of inter-layer interference has been observed. Also, prototype binary oxide based diodes have been fabricated for the purpose of suppressing intra-layer interference of cross-point memory array

Full integration and reliability evaluation of phase-change RAM based on 0.24 /spl mu/m-CMOS technologies

We have fully integrated a nonvolatile random access memory by successfully incorporating a reversibly phase-changeable chalcogenide memory element with MOS transistor. As well as basic characteristics of the memory operation, we have also observed reliable performances of the device on hot temperature operation, endurance against repetitive phase transition, writing imprint, reading disturbance and data retention.

Highly scalable on-axis confined cell structure for high density PRAM beyond 256Mb

We firstly fabricated on-axis confined structure and evaluated based on 64Mb PRAM with 0.12/spl mu/m-CMOS technologies. Ge/sub 2/Sb/sub 2/Te /sub 5/ was confined within small pore, which resulted in low writing current of 0.4mA. The pore is on-axis with upper and lower contacts, which leads to good scalability of PRAM above 256Mb. The confined structure was relatively insensitive to small cell edge damage effect. The on-axis confined structure is a promising candidate for high density PRAM due to low writing current, good scalability, and insensitiveness to edge damage.

Amorphous hafnium-indium-zinc oxide semiconductor thin film transistors

We developed amorphous hafnium-indium-zinc oxide (HIZO) thin films as oxide semiconductors and investigated the films electrically and physically. Adding of hafnium (Hf) element can suppress growing the columnar structure and drastically decrease the carrier concentration and hall mobility in HIZO films. The thin film transistors (TFTs) with amorphous HIZO active channel exhibit good electrical properties with field effect mobility of around 10 cm2/Vs, S of 0.23 V/decade, and high Ion/off ratio of over 108, enough to operate the next electronic devices. In particular, under bias-temperature stress test, the HIZO TFTs with 0.3 mol % (Hf content) showed only 0.46 V shift in threshold voltage, compared with 3.25 V shift in HIZO TFT (0.1 mol %). The Hf ions may play a key role to improve the instability of TFTs due to high oxygen bonding ability. Therefore, the amorphous HIZO semiconductor will be a prominent candidate as an operation device for large area electronic applications.

Novel cell structure of PRAM with thin metal layer inserted GeSbTe

We have developed a novel cell structure of PRAM with metal interlayer. This novel structure has been proposed to solve the over-programming fail. We have examined the cause of over-programming by simulation of the phase transition of chalcogenide and successfully demonstrated reliable cell operation of this novel structure in writing current level, crystallization speed, and endurance. It can be explained by a model in which the metal interlayer is a local heat sink and the top GST layer is a thermal insulator.

Gated three-terminal device architecture to eliminate persistent photoconductivity in oxide semiconductor photosensor arrays

The composition of amorphous oxide semiconductors, which are well known for their optical transparency, can be tailored to enhance their absorption and induce photoconductivity for irradiation with green, and shorter wavelength light. In principle, amorphous oxide semiconductor-based thin-film photoconductors could hence be applied as photosensors. However, their photoconductivity persists for hours after illumination has been removed, which severely degrades the response time and the frame rate of oxide-based sensor arrays. We have solved the problem of persistent photoconductivity (PPC) by developing a gated amorphous oxide semiconductor photo thin-film transistor (photo-TFT) that can provide direct control over the position of the Fermi level in the active layer. Applying a short-duration (10 ns) voltage pulse to these devices induces electron accumulation and accelerates their recombination with ionized oxygen vacancy sites, which are thought to cause PPC. We have integrated these photo-TFTs in a transparent active-matrix photosensor array that can be operated at high frame rates and that has potential applications in contact-free interactive displays.