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Dive into the research topics where Dongsheng Liu is active.

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Featured researches published by Dongsheng Liu.


IEEE Sensors Journal | 2015

Implementation of a New RFID Authentication Protocol for EPC Gen2 Standard

Zilong Liu; Dongsheng Liu; Lun Li; Hui Lin; Zhenqiang Yong

Researchers have revealed that electronic product code (EPC) Gen2 standard, which is designed for passive ultrahigh-frequency radio frequency identification has various security problems. To solve these problems, some authors have proposed many lightweight protocols to enhance security. However, it is still unclear about the feasibility of such protocols, since the hardware implementation of such protocols has long been neglected. Besides, it is extremely challengeable to achieve the balance among security, low power, and low cost. In this paper, a new lightweight mutual authentication protocol based on variable linear feedback shift registers is proposed, and its security analysis is described. An ASIC implementation of the new protocol compliant with the EPC Gen2 standard is presented as well. Several low-power techniques are used to obtain the goal of low-power consumption. The implementation result shows that the area of the baseband is 0.16 mm2 and power consumption is 5.5 μW. As far as we know, this is the first ASIC implementation of a lightweight protocol compliant to EPC Gen2 standard. We believe that this design will bring a novel insight to future implementations for EPC Gen2v2 standard, which is ratified recently.


IEEE Transactions on Industrial Electronics | 2015

Design and Implementation of An ECC-Based Digital Baseband Controller for RFID Tag Chip

Dongsheng Liu; Zilong Liu; Zhenqiang Yong; Xuecheng Zou; Jian Cheng

The extremely constrained resource has hindered the efforts to implement the elliptic curve cryptography (ECC) into a radio-frequency identification (RFID) tag chip. In this paper, an ECC-based RFID digital baseband controller (DBC), which is compatible with ISO/IEC 14443 and Schnorr authentication protocol, is presented. In order to achieve low resources consumption and fast ECC computation speed, some techniques, such as the register reuse, clock multiplexer, and asynchronous counter, are adopted in this design. In addition, a linear feedback shift register-based stream encryption scenario is proposed for the data security. According to the synthesis result, the gate area and power consumption of DBC are 25.7 K and 14.7 μW, respectively, in UMC 0.13 μm CMOS technology. All of those characteristics make the realization of ECC-based DBC for RFID tag chip promising.


Sensors | 2014

Design and Implementation of a RF Powering Circuit for RFID Tags or Other Batteryless Embedded Devices

Dongsheng Liu; Rencai Wang; Ke Yao; Xuecheng Zou; Liang Guo

A RF powering circuit used in radio-frequency identification (RFID) tags and other batteryless embedded devices is presented in this paper. The RF powering circuit harvests energy from electromagnetic waves and converts the RF energy to a stable voltage source. Analysis of a NMOS gate-cross connected bridge rectifier is conducted to demonstrate relationship between device sizes and power conversion efficiency (PCE) of the rectifier. A rectifier with 38.54% PCE under normal working conditions is designed. Moreover, a stable voltage regulator with a temperature and voltage optimizing strategy including adoption of a combination resistor is developed, which is able to accommodate a large input range of 4 V to 12 V and be immune to temperature variations. Latch-up prevention and noise isolation methods in layout design are also presented. Designed with the HJTC 0.25 μm process, this regulator achieves 0.04 mV/°C temperature rejection ratio (TRR) and 2.5 mV/V voltage rejection ratio (VRR). The RF powering circuit is also fabricated in the HJTC 0.25 μm process. The area of the RF powering circuit is 0.23 × 0.24 mm2. The RF powering circuit is successfully integrated with ISO/IEC 15693-compatible and ISO/IEC 14443-compatible RFID tag chips.


Sensors | 2014

Design of an Elliptic Curve Cryptography processor for RFID tag chips.

Zilong Liu; Dongsheng Liu; Xuecheng Zou; Hui Lin; Jian Cheng

Radio Frequency Identification (RFID) is an important technique for wireless sensor networks and the Internet of Things. Recently, considerable research has been performed in the combination of public key cryptography and RFID. In this paper, an efficient architecture of Elliptic Curve Cryptography (ECC) Processor for RFID tag chip is presented. We adopt a new inversion algorithm which requires fewer registers to store variables than the traditional schemes. A new method for coordinate swapping is proposed, which can reduce the complexity of the controller and shorten the time of iterative calculation effectively. A modified circular shift register architecture is presented in this paper, which is an effective way to reduce the area of register files. Clock gating and asynchronous counter are exploited to reduce the power consumption. The simulation and synthesis results show that the time needed for one elliptic curve scalar point multiplication over GF(2163) is 176.7 K clock cycles and the gate area is 13.8 K with UMC 0.13 μm Complementary Metal Oxide Semiconductor (CMOS) technology. Moreover, the low power and low cost consumption make the Elliptic Curve Cryptography Processor (ECP) a prospective candidate for application in the RFID tag chip.


ieee international conference on solid state and integrated circuit technology | 2014

A low power charge-redistribution SAR ADC with a monotonic switching procedure

Lun Li; Dongsheng Liu; Weila Lei; Yu Hu; Xuecheng Zou; Dawei Li

This paper proposed a novel low power charge-redistribution successive approximation analog-to-digital converter (CR-SAR ADC). During its conversion, the reference voltage is only half of the ADCs dynamic range. The monotonic switching procedure is used to further reduce the switching energy of the SAR ADC. Matlab simulations are performed to compare the switching energies in the proposed and previous low power SAR ADCs. A 11-bit 40-KS/s SAR ADC using the proposed technique is designed and simulated with UMC 0.18 µm 1P6M CMOS technology. The designed SAR ADC achieves 10.75 effective number of bit (ENOB) and consumes 10µW.


ieee international conference on solid state and integrated circuit technology | 2014

A lattice-based public-key encryption scheme for RFID applications

Hui Lin; Yahui Dong; Dongsheng Liu; Zilong Liu; Dawei Hou; Hengqing Tong

With strict limits on area and power consumption, its quite significant to design a novel RFID-suitable security scheme. In this paper, a lattice based public-key encryption scheme, the LWE cryptosystem is studied and the applicability for RFID system is assessed. The advantages and defects for the scheme to be implemented on hardware is analyzed, and improvement methods are proposed for the defects. Then, the applicability of LWE cryptosystem for RFID system is assessed from three aspects, security, circuit resources and power consumption. The results show that LWE cryptosystem is of high security, and can be easily hardware implemented, and the power consumption is very low. So, there are great possibilities that the LWE cryptosystem is used as a security scheme for the RFID system.


Journal of Circuits, Systems, and Computers | 2018

Design and Implementation of A Lattice-based Public-key Encryption Scheme

Hui Lin; Dongsheng Liu; Cong Zhang; Yahui Dong

Due to its advantage of quantum resistance and the provable security under some worst-case hardness assumptions, lattice-based cryptography is being increasingly researched. This paper tries to exp...


Sensors | 2017

A Low Power Low Phase Noise Oscillator for MICS Transceivers

Dawei Li; Dongsheng Liu; Chaojian Kang; Xuecheng Zou

A low-power, low-phase-noise quadrature oscillator for Medical Implantable Communications Service (MICS) transceivers is presented. The proposed quadrature oscillator generates 349~689 MHz I/Q (In-phase and Quadrature) signals covering the MICS band. The oscillator is based on a differential pair with positive feedback. Each delay cell consists of a few transistors enabling lower voltage operation. Since the oscillator is very sensitive to disturbances in the supply voltage and ground, a self-bias circuit for isolating the voltage disturbance is proposed to achieve bias voltages which can track the disturbances from the supply and ground. The oscillation frequency, which is controlled by the bias voltages, is less sensitive to the supply and ground noise, and a low phase noise is achieved. The chip is fabricated in the UMC (United Microelectronics Corporation) 0.18 μm CMOS (Complementary Metal Oxide Semiconductor) process; the core just occupies a 28.5 × 22 μm2 area. The measured phase noise is −108.45 dBc/Hz at a 1 MHz offset with a center frequency of 540 MHz. The gain of the oscillator is 0.309 MHz/mV with a control voltage from 0 V to 1.1 V. The circuit can work with a supply voltage as low as 1.2 V and the power consumption is only 0.46 mW at a 1.8 V supply voltage.


Journal of Circuits, Systems, and Computers | 2017

A Low-Cost RFID Regulator Insensitive to Temperature and Supply Voltage Variations

Dawei Li; Dongsheng Liu; Xuecheng Zou; Ke Yao; Chaojian Kang; Huarong Zeng

A low-cost regulator insensitive to temperature and supply voltage variations for power management units of Radio Frequency Identification (RFID) tag chips and other batteryless devices is proposed in this paper. The commonly used regulator has poor temperature rejection ratio (TRR) and poor voltage rejection ratio (VRR). By using combination resistors and long channel transistors, the bias and regulator circuits are improved over temperature variations. A power supply rejection (PSR) enhancement branch is also added to suppress the supply noise and stabilize the bias current. The regulator is designed and fabricated in the HJTC 0.25μm CMOS technology. Simulation results show that this regulator achieves 0.044mV/∘C TRR when temperature varies from −20∘C to 70∘C and 1.1mV/V VRR while the supply voltage of the regulator ranges from 4 to 12V. The PSR is nearly −100dB at DC. The area of this regulator is 0.102mm2 including the bias circuit. The measurement results meet simulation results well and this regulat...


IEICE Electronics Express | 2017

An ultra-low power low cost LDO for UHF RFID tag

Dawei Li; Dongsheng Liu; Chaojian Kang; Meilin Wan; Xuecheng Zou

An ultra-low power low cost LDO (low-dropout voltage regulator) for UHF RFID tag chip is presented. In order to reduce the cost, a low temperature coefficient voltage reference with only 15 K resistor is proposed, this voltage reference is based on sub-threshold operation and the power consumption is minimized. A pole-zero tracking compensation circuit is used, this scheme generates an internal zero which tracks the pole produced by the load current. The design is based on UMC 0.18μm 2P5M EEPROM process, and the active area is only 0.0146 mm2. The LDO has a maximum load capacity of 5 mA while outputs a 1.1 V stable voltage. The measured undershoot and overshoot are 55 mV and 60 mV respectively. With the ultra-low power voltage reference circuit, the total quiescent current is only 370 nA under a 1.2 V power supply. The proposed regulator has been used in UHF RFID tag chips successfully.

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Xuecheng Zou

Huazhong University of Science and Technology

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Zilong Liu

Huazhong University of Science and Technology

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Hui Lin

Wuhan University of Technology

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Dawei Li

Huazhong University of Science and Technology

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Jian Cheng

Huazhong University of Science and Technology

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Chaojian Kang

Huazhong University of Science and Technology

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Lun Li

Huazhong University of Science and Technology

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Zhenqiang Yong

Huazhong University of Science and Technology

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Yahui Dong

Huazhong University of Science and Technology

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Cong Zhang

Huazhong University of Science and Technology

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