Dongsheng Ma

A pseudo-CCM/DCM SIMO switching converter with freewheel switching

A single-inductor multiple-output switching converter operates in pseudo-CCM/DCM. It requires freewheeling of the inductor current during the instants when the n switch and all output p switches are off. It is fabricated in a 0.5 /spl mu/m CMOS n-well process with Voa=2.5 V and Vob=3.0 V. With 1 /spl mu/H inductor, converter efficiency is 84.7% at 1 MHz.

Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode

An integrated single-inductor dual-output boost converter is presented. This converter adopts time-multiplexing control in providing two independent supply voltages (3.0 and 3.6 V) using only one 1-/spl mu/H off-chip inductor and a single control loop. This converter is analyzed and compared with existing counterparts in the aspects of integration, architecture, control scheme, and system stability. Implementation of the power stage, the controller, and the peripheral functional blocks is discussed. The design was fabricated with a standard 0.5-/spl mu/m CMOS n-well process. At an oscillator frequency of 1 MHz, the power conversion efficiency reaches 88.4% at a total output power of 350 mW. This topology can be extended to have multiple outputs and can be applied to buck, flyback, and other kinds of converters.

Single-inductor multiple-output switching converters

A family of single-inductor multiple-output switching power converters is presented. They can be classified into same-type, bipolar and mixed-type converters. Synchronous rectification and control loop design are discussed, and experimental and simulation results of representative converters are presented to verify the functionality of these converters.

An integrated one-cycle control buck converter with adaptive output and dual loops for output error correction

An integrated adaptive-output switching converter is presented. This converter adopts one-cycle control for fast line response and dual error correction loops for tight load regulation. A dc level shifting technique is proposed to eliminate the use of negative supply and reference voltages in the controller and make the design compatible with standard digital CMOS process. The design accommodates both continuous and discontinuous conduction operations. To further enhance the efficiency, dynamic loss control on the power transistors is proposed to minimize the sum of switching and conduction losses. The design can be extended to other dc-dc and ac-dc conversions. The prototype of the buck converter was fabricated with a standard 0.5-/spl mu/m digital CMOS process. Experimental results show that the converter is well regulated over an output range of 0.9-2.5 V, with a supply voltage of 3.3 V. The tracking speeds are 12.25 /spl mu/s/V for a 1.6-V step-up output change and 13.75 /spl mu/s/V for a 1.6-V step-down output change, respectively, which are much faster than existing counterparts. Maximum efficiency of 93.7% is achieved and high efficiency above 75% is retained over an output power ranging from 10 to 450 mW.

A Sub-1-V Low-Noise Bandgap Voltage Reference

A new sub-1-V bandgap voltage reference is presented in this paper, which has advantages over the prior arts in terms of output noise and compatibility with several fabrication processes. The topology allows the reference to operate with a supply voltage as low as 1 V by employing the reverse bandgap voltage principle (RBVP). It also has an attractive low-noise output without the use of a large external filtering capacitor. The design was fabricated with a 0.5-mum BiCMOS process, but it is compatible with most CMOS and BiCMOS fabrication processes. The entire die area is approximately 0.4 mm2, including all test pads and dummy devices. Theoretical analysis and experimental results show that the output noise spectral density is 40 nV/radicHz with a bias current of 20 muA. Moreover, the peak-to-peak output noise in the 0.1-10 Hz band is only 4 muV. The untrimmed reference has a mean output voltage of 190.9 mV at room temperature, and it has a temperature coefficient in the -40degC to +125degC range of 11 ppm/degC (mean) with a standard deviation of 5 ppm/degC.

A SIMO Parallel-String Driver IC for Dimmable LED Backlighting With Local Bus Voltage Optimization and Single Time-Shared Regulation Loop

Traditional LED drivers with multiple converters for powering up multiple strings in parallel suffer from high system volume and cost. The reported literature with single converter and dynamic bus voltage offers compact designs. However, the performance on power consumption is degraded. Meanwhile, all the aforementioned approaches require multiple current regulation elements, which inflict current balance errors due to mismatches. A compact single-inductor multiple-output parallel-string LED driver with time-multiplexing control is, thus, proposed. It can independently optimize local bus voltages for power loss reduction. In addition, a single time-shared control loop is proposed for current regulation in multiple parallel strings, resulting in a dramatic reduction of current balance errors. A 0.35 μm CMOS prototype achieves 2.8 times loss reduction over the reported literature, with a current balance error well controlled below 1.7%. The control scheme also offers flexible dimming for advanced backlighting operations.

Loop gain analysis and development of high-speed high-accuracy current sensors for switching converters

Loop gain analysis for performance evaluation of current sensors for switching converters is presented. The MOS transistor scaling technique is reviewed and employed in developing high-speed and high-accuracy current-sensors with offset-current cancellation. Using a standard 0.35/spl mu/m CMOS process, and integrated full-range inductor current sensor for a boost converter is designed. It operated at a supply voltage of 1.5 V with a DC loop gain of 38 dB, and a unity gain frequency of 10 MHz. The sensor worked properly at a converter switching frequency of 500 kHz.

Design and Analysis of Monolithic Step-Down SC Power Converter With Subthreshold DPWM Control for Self-Powered Wireless Sensors

This paper presents a fully integrated switched-capacitor power converter for self-powered wireless sensor nodes. The design features an efficient step-down charge-pump power stage and a frequency-programmable digital feedback controller. The subthreshold-region design significantly reduces the power dissipation in the controller. Meanwhile, the programmable switching-frequency digital-pulsewidth-modulation control keeps the converter stay at high efficiency, without causing a random noise spectrum. Monolithic implementation effectively suppresses noise and glitches caused by parasitic components due to bonding, packaging, and PCB wiring. Design strategy, system modeling, optimization, and circuit implementation are addressed. An IC prototype was fabricated with a standard 0.35-¿m digital CMOS n-well process. It precisely provides a dynamic-voltage-scaling-compatible adjustable power output from 0.8 to 1.5 V and from 400 ¿W to 7.5 mW. The switching frequency is programmable from 200 kHz to 1 MHz. It achieves 66.7% efficiency with a controller power dissipation of only 147.5 ¿W.

Enabling Power-Efficient DVFS Operations on Silicon

With the perpetual power increase in modern VLSI systems, efficient and effective power management has been critical to next-generation IC designs. To overcome this grand challenge, techniques, such as dynamic voltage/frequency scaling (DVFS), have been proposed to jointly optimize power, energy and operating performance, leading to significantly improved system reliability, efficiency and battery lifetime. From both system-level and circuit-level perspectives, this paper investigates key design issues, control schemes, circuit architectures and future research directions, involved in the development of application-aware, multiple- and variable-output DC-DC power converters. The article first discusses key multiple-output converters such as the single-inductor multiple-output (SIMO) DC-DC converters and their system-level integration for DVFS power management, followed by our investigation on various adaptive-output power converter topologies and corresponding design challenges. The paper also addresses the importance of hardware-software co-design for future power management systems. With the integration of the enabling hardware platform, power processing, in addition to the traditional signal processing, rises to become another key factor to next-generation VLSI designs. This naturally enables effective on-chip power tracking, power processing and thermal monitoring. More importantly, it would significantly change traditional design concepts and largely benefit signal processing in return, eventually leading to revolutionary changes on system reliability, performance, efficiency and operating lifetime.

A 1.8 V single-inductor dual-output switching converter for power reduction techniques

A 1.8 V integrated single-inductor dual-output boost converter is presented. This converter adopts a time-multiplexing control in providing two independent supply voltages using only one 1 /spl mu/H off-chip inductor. The topology could easily be extended to give multiple outputs. The converter is fabricated with a standard 0.5 /spl mu/m CMOS n-well process. At an oscillator frequency of 1 MHz, the conversion efficiency reaches 88% at a total output power of 350 mW.