Doo Hyung Woo

Smart Reset Control for Wide-Dynamic-Range LWIR FPAs

A new readout circuit involving a pixel-level reset control was studied for 2-D long-wavelength infrared (LWIR) focal plane arrays. The integration time of each pixel can be optimized individually and automatically. Hence, the readout circuit has a wide dynamic range and good signal-to-noise ratio (SNR) characteristics. The readout circuit was fabricated with a 0.35-μm 2-poly 4-metal CMOS process for a 128 × 128 LWIR HgCdTe array with a pixel size of 50 μm × 50 μm. The smart reset control with two-step background suppression improves the SNR to 87 dB and the dynamic range to 95.8 dB.

Current Input Extended Counting ADC With Wide Dynamic Range for LWIR FPAs

A readout circuit incorporating a pixel level analog-to-digital converter (ADC) is studied for 2-D long wavelength infrared focal plane arrays (LWIR FPAs). The charge handling capacity of the unit cell circuit is improved by using the current input incremental ADC. The proposed pixel level ADC is based on an extended counting ADC but is composed of two oversampling conversions. The readout circuit has been fabricated using a 0.35 mum 2-poly 4-metal CMOS process for a 128 times 128 LWIR HgCdTe array with a pixel size of 50 mum times 50 mum. The peak signal-to-noise ratio (S/N) and dynamic range (DR) were measured to be 85.8 dB and 99.9 dB, respectively, with a total power consumption of 50 mW.

TEC-Less ROIC With Self-Bias Equalization for Microbolometer FPA

This paper describes a new CMOS readout circuit, which makes the microbolometer focal plane array have low spatial noise over a wide operating temperature range without a thermoelectric cooler. The readout circuit corrects the nonuniformity of each microbolometer pixel by the proposed self-bias equalization technique. The proposed readout circuit adopting the self-bias equalization has a feedback loop that makes the readout circuit find the bias voltage for the correction of nonuniformity by itself. The proposed circuit was fabricated using a 0.35-μm standard CMOS process. The measured results of the fabricated chip show that the spatial noise is less than the allowed spatial noise for the equivalent temperature difference of 50 mK over a wide operating temperature range.

Very Wide Dynamic Range ROIC With Pixel-Level ADC for SWIR FPAs

This paper describes a new wide dynamic range readout circuit incorporating a pixel-level time-to-digital analog-to-digital converter for a short-wavelength infrared InGaAs focal plane array. To extend the dynamic range, the self-controlled integration capacitance technique and the detector current adaptive integration time technique are adopted in the readout circuit, which is operated individually in each pixel. Each pixel can have an appropriate gain independently depending on the signal current without any help from a digital processor. The readout circuit was fabricated using a 0.35-μm standard CMOS process. The measured results of the fabricated chip show that the dynamic range exceeds 140 dB and that the noise level is 73.35 e-rms.

Low-Noise and Wide-Dynamic-Range ROIC With a Self-Selected Capacitor for SWIR Focal Plane Arrays

This paper proposes a readout integrated circuit (ROIC) for short-wavelength infrared focal plane arrays, which adopts a self-selected capacitor technique to reduce ROIC noise and extend the dynamic range. The self-selected capacitor technique independently operates in each pixel. The proposed readout circuit was designed and fabricated using a 0.35-μm CMOS process. The noise measurement result of the fabricated ROIC was 43 e- and the dynamic range was 101 dB.

Optimum Solution of On-Chip A/D Converter for Cooled Type Infrared Focal Plane Array

Transferring the image information in analog form between the focal plane array (FPA) and the external electronics causes the disturbance of the outside noise. On-chip analog-to-digital (A/D) converter into the readout integrated circuit (ROIC) can eliminate the possibilities of the cross-talk of noise. Also, the information can be transported more efficiently in power in the digital domain compared to the analog domain. In designing on-chip A/D converter for cooled type high density infrared detector array, the most stringent requirements are power dissipation, number of bits, die area and throughput. In this study, pipelined type A/D converter was adopted because it has high operation speed characteristics with medium power consumption. Capacitor averaging technique and digital error correction for high resolution was used to eliminate the error which is brought out from the device mismatch. The readout circuit was fabricated using 0.6 μm CMOS process for 128 x 128 mid-wavelength infrared (MWIR) HgCdTe detector array. Fabricated circuit used direct injection type for input stage, and then S/N ratio could be maximized with increasing the integration capacitor. The measured performance of the 14 b A/D converter exhibited 0.2 LSB differential non-linearity (DNL) and 4 LSB integral non-linearity (INL). A/D converter had a 1 MHz operation speed with 75 mW power dissipation at 5 V. It took the die area of 5.6 mm 2 . It showed the good performance that can apply for cooled type high density infrared detector array.

An ambient-light sensor system with startup correction for LTPS-TFT LCD

An ambient-light sensor system using low-temperature poly-silicon thin film transistors was studied, to reduce the power consumption of mobile applications. The proposed system with startup correction can correct the panel-to-panel variation of the ambient-light sensors, without additional equipment. The digital output of the readout circuit has 8 levels per decade for the input luminance ranges from 100 to 10000 lux, and the readout rate is 40Hz. The proposed method provides maximum differential nonuniformity below 0.3 LSB.

ROIC with adaptive reset control for improving dynamic range of IR FPAs

A new readout integrated circuit involving an adaptive reset control was studied for 2-D infrared focal plane arrays. The integration time of each pixel can be optimized adaptively. Hence, the readout circuit has a wide dynamic range and good signal-to-noise ratio characteristics. The readout circuit was fabricated with a 0.35 µm 2-poly 4-metal CMOS process for a 128 × 128 long wavelength infrared array with a pixel size of 50 µm × 50 µm. The adaptive reset control with two-step background suppression improves the signal-to-noise ratio to 87 dB and the dynamic range to 95.4 dB.