Donggu Im

A Wideband CMOS Low Noise Amplifier Employing Noise and IM2 Distortion Cancellation for a Digital TV Tuner

A wideband CMOS low noise amplifier (LNA) with single-ended input and output employing noise and IM2 distortion cancellation for a digital terrestrial and cable TV tuner is presented. By adopting a noise canceling structure combining a common source amplifier and a common gate amplifier by current amplification, the LNA obtains a low noise figure and high IIP3. IIP2 as well as IIP3 of the LNA is important in broadband systems, especially digital terrestrial and cable TV applications. Accordingly, in order to overcome the poor IIP2 performance of conventional LNAs with single-ended input and output and avoid the use of external and bulky passive transformers along with high sensitivity, an IM2 distortion cancellation technique exploiting the complementary RF performance of NMOS and PMOS while retaining thermal noise canceling is adopted in the LNA. The proposed LNA is implemented in a 0.18 mum CMOS process and achieves a power gain of 14 dB, an average noise figure of 3 dB, an IIP3 of 3 dBm, an IIP2 of 44 dBm at maximum gain, and S11 of under -9 dB in a frequency range from 50 MHz to 880 MHz. The power consumption is 34.8 mW at 2.2 V and the chip area is 0.16 mm2.

A CMOS Active Feedback Balun-LNA With High IIP2 for Wideband Digital TV Receivers

A wideband active feedback single-to-differential (S-to-D) low-noise amplifier (LNA) for digital TV (DTV) tuners composed of a S-to-D converter, a voltage combiner, and a negative feedback network is proposed to achieve low noise as well as to improve the linearity performances (IIP2 and IIP3) simultaneously. By feeding the single-ended output of the voltage combiner, which is used for combining the differential output of the S-to-D converter, to the input of the LNA through the feedback network, a wideband S-to-D LNA exploiting negative feedback is implemented. The differential mode operation of the voltage combiner reduces the second-order nonlinearity feedback, allowing us to improve both the IIP3 and IIP2 of the LNA at the same time. Two LNA design examples are presented to demonstrate usefulness of the proposed approach. The LNA I, by adopting a common source (CS) amplifier with a common gate, common source (CGCS) balun load as the S-to-D converter, is able to achieve a high gain and a low noise figure (NF) by increasing the loop gain. The LNA II using the differential amplifier with the ac-grounded second input terminal is designed for robust IIP2 to PVT variations.

In Vivo Silicon-Based Flexible Radio Frequency Integrated Circuits Monolithically Encapsulated with Biocompatible Liquid Crystal Polymers

Biointegrated electronics have been investigated for various healthcare applications which can introduce biomedical systems into the human body. Silicon-based semiconductors perform significant roles of nerve stimulation, signal analysis, and wireless communication in implantable electronics. However, the current large-scale integration (LSI) chips have limitations in in vivo devices due to their rigid and bulky properties. This paper describes in vivo ultrathin silicon-based liquid crystal polymer (LCP) monolithically encapsulated flexible radio frequency integrated circuits (RFICs) for medical wireless communication. The mechanical stability of the LCP encapsulation is supported by finite element analysis simulation. In vivo electrical reliability and bioaffinity of the LCP monoencapsulated RFIC devices are confirmed in rats. In vitro accelerated soak tests are performed with Arrhenius method to estimate the lifetime of LCP monoencapsulated RFICs in a live body. The work could provide an approach to flexible LSI in biointegrated electronics such as an artificial retina and wireless body sensor networks.

A CMOS Resistive Feedback Differential Low-Noise Amplifier With Enhanced Loop Gain for Digital TV Tuner Applications

A resistive feedback differential low-noise amplifier (LNA) with enhanced loop gain is implemented as a part of a digital TV (DTV) tuner using a 0.18-mum CMOS process. A voltage buffer having higher gain, higher linearity, and lower noise figure (NF) than those of the conventional differential source follower (DSF), which is called the differential hybrid voltage buffer (DHVB) in this paper, is designed by combining the common source amplifier and source follower. By adopting the DHVB with optimized performance as a voltage buffer of the conventional resistive feedback differential LNA, the loop gain of the LNA can be increased. This leads to a highly linear resistive feedback LNA with higher gain and lower NF compared to the conventional resistive feedback LNA. For the wide gain range, the proposed LNA includes the variable gain function based on the resistive attenuator employing the T-switch. The measurement results of the proposed LNA exhibit a maximum gain of 16 dB and a gain range of 50 dB. At maximum gain, the LNA shows an average NF of 2.8 dB, a third-order input-referred intercept point of -1 dBm, a second-order input-referred intercept point of 40 dBm, and S11 of under -9 dB in a frequency range from 48 to 860 MHz. The power consumption is 30.6 mW at a 1.8-V power supply and the chip area is 0.25 mm2.

A Highly Linear Wideband CMOS Low-Noise Amplifier Based on Current Amplification for Digital TV Tuner Applications

A differential wideband low-noise amplifier (LNA) based on the current amplification scheme is presented for digital TV tuners. In order to highly improve the linearity and exploit the noise cancellation, a common-gate stage with positive current feedback is integrated in parallel with a common-source stage using the current mirror amplifier. The proposed 0.18-mum CMOS LNA exhibits a power gain of 20.5 dB, an IIP3 of 2.7 dBm, an IIP2 of 43 dBm, and an average noise figure of 3.3 dB with 32.4 mW power consumption at a 1.8-V power supply and 0.12 mm2 area.

A Low Power Broadband Differential Low Noise Amplifier Employing Noise and IM3 Distortion Cancellation for Mobile Broadcast Receivers

A CMOS broadband differential low noise amplifier (LNA) employing noise and third order intermodulation (IM3) distortion cancellation has been designed using a 0.13 μm CMOS process for mobile TV tuners. By combining a common gate amplifier with a common source amplifier through a current mirror, a high gain due to the additional current amplification and a low noise figure (NF) due to the thermal noise cancellation can be achieved with low power consumption without degrading the input matching. To improve the linearity with low power consumption, a multiple gated transistor technique for canceling the IM3 distortion is adopted. The proposed LNA has a maximum gain of 14.5 dB, an averaged NF of 3.6 dB, an IIP3 of 3 dBm, an IIP2 of 38 dBm, and an |Sn11| lower than -9 dB in a frequency range from 72 to 850 MHz. The power consumption is 9.6 mW at a 1.2 V supply voltage and the chip area is 0.08 mm2.

A Broadband CMOS RF Front-End for Universal Tuners Supporting Multi-Standard Terrestrial and Cable Broadcasts

A wideband CMOS highly linear and low noise RF front-end including inductor-less wideband LNA, integrated passive tunable filter, harmonic rejection mixer (HRM), and loop-through amplifier (LTA) is proposed for universal tuners. The proposed inductor-less wideband LNA shows a gain range greater than 55 dB with fine gain step less than 0.5 dB while achieving higher linearity and lower noise figure (NF), as compared with the traditional resistive/active feedback LNA through a source follower (SF). The integrated tunable filter covers the entire VHF bands without dividing the frequency range by multiple filters. By adopting tunable filter and HRM simultaneously, the overall harmonic rejection ratio (HRR) of over 65 dBc is obtained. The active feedback LTA utilizing a complementary characteristic of NMOS and PMOS is proposed for supporting multiple tuner applications. The proposed RF front-end achieves a maximum voltage gain of 42 dB, a minimum NF of 4.7 dB, and CTB and CSO of under -60 dBc. The power consumption including the LTA is 144 mW at a 1.8 V supply and the chip area is 1.43 mm2 .

A Wide-Band CMOS Variable-Gain Low Noise Amplifier for Multi-Standard Terrestrial and Cable TV Tuner

A CMOS wide-band low noise amplifier (LNA) based on the current amplification for the multi-standard terrestrial and cable tuner is proposed. Conventional wide-band LNAs suffer from the tradeoff between noise figure and wide-band input matching. By adopting the structure combined the common source (CS) amplifier with the common gate (CG) amplifier by the current amplification, the noise figure does not have any influence on wide-band input matching so that we can achieve low noise figure by the noise canceling and excellent wide-band input matching at the same time while allowing some variable gains. The proposed LNA is fabricated in 0.18-mum CMOS process and achieves a power gain of +15.5~-5.5 dB, an average noise figure of 3.6 dB, an IIP3 of -1 dBm at the maximum gain, and S11 of -15 dB. The power consumption is 50.4 mW and chip area is 0.54 mm2.

A CMOS active feedback wideband single-to-differential LNA using inductive shunt-peaking for saw-less SDR receivers

A wideband active feedback single-to-differential (S-to-D) LNA composed of a S-to-D converter, a voltage combiner, and a negative feedback network is proposed. By feeding the single-ended output of the voltage combiner, which is used for combining the differential output of the S-to-D converter, to the input of the LNA through the feedback network, a wideband S-to-D LNA exploiting negative feedback is implemented. By using shunt-peaking of the source follower (SF) based active inductor, the proposed S-to-D LNA can achieve wider loop gain bandwidth with balun functionality. The 3-dB gain bandwidth of the proposed S-to-D LNA is above 5 GHz and the NF is below 4 dB from 100 MHz to 5 GHz. An average voltage gain of 18 dB and an ΠΡ3 of −5 dBm are obtained.

A Wideband Digital TV Receiver Front-End With Noise and Distortion Cancellation

A low noise and highly linear wideband CMOS receiver front-end for digital TV receivers is proposed. The proposed RF front-end comprises a wideband noise canceling common gate low noise amplifier (LNA) with a capacitively cross-coupled current source, a highly linear up-conversion micromixer with third-order intermodulation distortion cancellation, and a highly linear surface acoustic wave (SAW) driver with enhanced loop gain. The RF front-end was fabricated using a 0.13 μm CMOS process and it draws 27 mA from a 1.5 V supply voltage. It achieves a voltage gain of 23 dB, a noise figure of less than 4 dB, an IIP3 of greater than -6.5 dBm, and an IIP2 of greater than 28 dBm across the entire input band from 54 MHz to 882 MHz.