Eamon O'Connor

A systematic study of (NH4)2S passivation (22%, 10%, 5%, or 1%) on the interface properties of the Al2O3/In0.53Ga0.47As/InP system for n-type and p-type In0.53Ga0.47As epitaxial layers

In this work, we present the results of an investigation into the effectiveness of varying ammonium sulphide (NH4)2S concentrations in the passivation of n-type and p-type In0.53Ga0.47As. Samples were degreased and immersed in aqueous (NH4)2S solutions of concentrations 22%, 10%, 5%, or 1% for 20 min at 295 K, immediately prior to atomic layer deposition of Al2O3. Multi-frequency capacitance-voltage (C-V) results on capacitor structures indicate that the lowest frequency dispersion over the bias range examined occurs for n-type and p-type devices treated with the 10%(NH4)2S solution. The deleterious effect on device behavior of increased ambient exposure time after removal from 10%(NH4)2S solution is also presented. Estimations of the interface state defect density (Dit) for the optimum 10%(NH4)2S passivated In0.53Ga0.47As devices extracted using an approximation to the conductance method, and also extracted using the temperature-modified high-low frequency C-V method, indicate that the same defect is pre...

Temperature and frequency dependent electrical characterization of HfO2/InxGa1−xAs interfaces using capacitance-voltage and conductance methods

Electrical properties of metal-oxide-semiconductor capacitors using atomic layer deposited HfO2 on n-type GaAs or InxGa1−xAs (x=0.53, 0.30, 0.15) epitaxial layers were investigated. Capacitance-voltage (CV) measurements indicated large temperature and frequency dispersion at positive gate bias in devices using n-type GaAs and low In content (x=0.30, 0.15) InxGa1−xAs layers, which is significantly reduced for devices using In0.53Ga0.47As. For In0.53Ga0.47As devices, the CV response at negative gate bias is most likely characteristic of an interface state response and may not be indicative of true inversion. The conductance technique on Pd/HfO2/In0.53Ga0.47As/InP shows reductions in interface state densities by In0.53Ga0.47As surface passivation and forming gas annealing (325 °C).

Impact of Forming Gas Annealing on the Performance of Surface-Channel

We investigated the effect of forming gas (5% H₂/95% N₂) annealing on surface-channel In_0.53 Ga_0.47As MOSFETs with atomic-layer-deposited Al₂O₃ as the gate dielectric. We found that a forming gas anneal (FGA) at 300°C for 30 min was efficient at removing or passivating positive fixed charges in Al₂O₃ , resulting in a shift of the threshold voltage from -0.63 to 0.43 V and in an increase in the <i>I</i>_on/<i>I</i>_off ratio of three orders of magnitude. Following FGA, the MOSFETs exhibited a subthreshold swing of 150 mV/dec, and the peak transconductance, drive current, and peak effective mobility increased by 29%, 25%, and 15%, respectively. FGA significantly improved the source- or drain-to-substrate junction isolation, with a reduction of two orders of magnitude in the reverse bias leakage exhibited by the Si-implanted In_0.53Ga_0.47As n⁺/p junctions, which is consistent with passivation of midgap defects in In_0.53Ga_0.47As by the FGA process.

\hbox{In}_{0.53}\hbox{Ga}_{0.47}\hbox{As}

In this work, we present the results of an investigation into charge trapping in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors (MOS capacitors), which is analysed using the hysteresis exhibited in the capacitance-voltage (C-V) response. The availability of both n and p doped In0.53Ga0.47As epitaxial layers allows the investigation of both hole and electron trapping in the bulk of HfO2 and Al2O3 films formed using atomic layer deposition (ALD). The HfO2/In0.53Ga0.47As and Al2O3/In0.53Ga0.47As MOS capacitors exhibit an almost reversible trapping behaviour, where the density of trapped charge is of a similar level to high-k/In0.53Ga0.47As interface state density, for both electrons and holes in the HfO2 and Al2O3 films. The experimental results demonstrate that the magnitude of the C-V hysteresis increases significantly for samples which have a native oxide layer present between the In0.53Ga0.47As surface and the high-k oxide, suggesting that the charge trapping responsible for the C-V hys...

MOSFETs With an ALD

In this work, we present experimental results examining the energy distribution of the relatively high (> 1 X 10(11) cm(-2)) electrically active interface defects which are commonly observed in high-dielectric-constant (high-k) metal-insulator-silicon systems during high-k process development. This paper extends previous studies on the Si(100)/SiOx/HfO2 system to include a comparative analysis of the density and energy distribution of interface defects for HfO2, lanthanum silicate (LaSiOx), and Gd2O3 thin films on (100) orientation silicon formed by a range of deposition techniques. The analysis of the interface defect density across the energy gap, for samples which experience no H-2/N-2 annealing following the gate stack formation, reveals a peak density (similar to 2 X 10(12) cm(-2) eV(-1) to similar to 1 X 10(13) cm(-2) eV(-1)) at 0.83-0.92 eV above the silicon valence bandedge for the HfO2, LaSiOx, and Gd2O3 thin films on Si (100). The characteristic peak in the interface state density (0.83-0.92 eV) is obtained for samples where no interface silicon oxide layer is observed from transmission electron microscopy. Analysis suggests silicon dangling bond (P-bo) centers as the common origin for the dominant interface defects for the various Si(100)/SiOx/high-k/metal gate systems. The results of forming gas (H-2/N-2) annealing over the temperature range 350-555 degrees C are presented and indicate interface state density reduction, as expected for silicon dangling bond centers. The technological relevance of the results is discussed. (c) 2007 The Electrochemical Society.

\hbox{Al}_{2}\hbox{O}_{3}

In this paper, we present a review of experimental results examining charged defect components in the Al₂O₃/In_0.53Ga_0.47As metal-oxide-semiconductor (MOS) system. For the analysis of fixed oxide charge and interface state density, an approach is described where the flatband voltage for n- and p-type Al₂O₃/In_0.53Ga_0.47As MOS structures is used to separate and quantify the contributions of fixed oxide charge and interface state density. Based on an Al₂O₃ thickness series (10-20 nm) for the n- and p-type In_0.53Ga_0.47As layers, the analysis reveals a positive fixed charge density ( ~ 9 ×10¹⁸ cm^-3) distributed throughout the Al₂O₃ and a negative sheet charge density (- 8 × 10¹² cm^-2) located near the Al₂O₃/In_0.53Ga_0.47As interface. The interface state density integrated across the energy gap is ~1 ×10¹³ cm^-2 and is a donor-type (+/0) defect. The density of the fixed oxide charge components is significantly reduced by forming gas (5 % H₂/ 95% N₂ ambient at 350 °C for 30 minutes) annealing. The interface state distribution obtained from multi-frequency capacitance-voltage and conductance-voltage measurements on either MOS structures or MOSFETs indicates a peak density located around the In_0.53Ga_0.47As midgap energy, with a sharp increase in the interface state density toward the valance band and evidence of interface states aligned with the In_0.53Ga_0.47As conduction band. The integrated interface state density obtained from multi-frequency capacitance-voltage and conductance-voltage analysis is in good agreement with the approach of comparing the flatband voltages in n- and p -type Al₂O₃/In_0.53Ga_0.47As MOS structures. Finally, this paper reviews recent work based on an optimization of the In_0.53Ga_0.47As surface preparation using (NH₄)₂S, combined with minimizing the transfer time to the atomic layer deposition reactor for Al₂O₃, which indicates interface state reduction and genuine surface inversion for both n- and p -type Al₂O₃/In_0.53Ga_0.47As MOS structures.

Gate Dielectric

Diffusion of indium through HfO2 after post deposition annealing in N2 or forming gas environments is observed in HfO2/In0.53Ga0.47As stacks by low energy ion scattering and X-ray photo electron spectroscopy and found to be consistent with changes in interface layer thickness observed by transmission electron microscopy. Prior to post processing, arsenic oxide is detected at the surface of atomic layer deposition-grown HfO2 and is desorbed upon annealing at 350 °C. Reduction of the interfacial layer thickness and potential densification of HfO2, resulting from indium diffusion upon annealing, is confirmed by an increase in capacitance.

An investigation of capacitance-voltage hysteresis in metal/high-k/In0.53Ga0.47As metal-oxide-semiconductor capacitors

The electron energy band alignment at interfaces of InxGa1−xAs (0≤x≤0.53) with atomic-layer deposited insulators Al2O3 and HfO2 is characterized using internal photoemission and photoconductivity experiments. The energy of the InxGa1−xAs valence band top is found to be only marginally influenced by the semiconductor composition. This result suggests that the known bandgap narrowing from 1.42 to 0.75 eV when the In content increases from 0 to 0.53 occurs mostly through downshift of the semiconductor conduction band bottom. It finds support from both electron and hole photoemission data. Similarly to the GaAs case, electron states originating from the interfacial oxidation of InxGa1−xAs lead to reduction in the electron barrier at the semiconductor/oxide interface.

Interface Defects in HfO2, LaSiOx, and Gd2O3 High-k/Metal-Gate Structures on Silicon

We provide the first report of the structural and electrical properties of TiN/ZrO2/Ti/Al metal-insulator-metal capacitor structures, where the ZrO2 thin film (7-8 nm) is deposited by ALD using the new zirconium precursor ZrD-04, also known as Bis(methylcyclopentadienyl) methoxymethyl. Measured capacitance-voltage (C-V) and current-voltage (I-V) characteristics are reported for premetallization rapid thermal annealing (RTP) in N2 for 60 s at 400degC, 500degC, or 600degC. For the RTP at 400degC, we find very low leakage current densities on the order of nanoamperes per square centimeter at a gate voltage of 1 V and low capacitance equivalent thickness values of ~ 0.9 nm at a gate voltage of 0 V. The dielectric constant of ZrO2 is 31 plusmn 2 after RTP treatment at 400degC.

The Characterization and Passivation of Fixed Oxide Charges and Interface States in the

In this study, the growth, stochiometry and electrical characteristics of MgO thin films, deposited by electron beam evaporation on Si(100) surfaces, have been investigated. Films of different thicknesses were deposited on HF last and chemical oxide Si(100) surfaces in order to determine the effect of factors such as film thickness, surface preparation and substrate temperature on film growth. Using atomic force microscopy (AFM), the predominant film growth mechanism was found to be Volmer Weber, with factors such as film thickness determining the height at which 3 dimensional islands coalesce to form a continuous film. Chemical analysis using X-ray photoelectron spectroscopy (XPS) showed that MgO deposition on hydrogen terminated silicon surfaces produced films of more uniform thickness than those deposited on surfaces with a native chemical oxide. XPS spectra of the O1s core level exhibits two oxygen peaks, a lower binding energy peak (LBE) which can be attributed to the lattice oxygen in the MgO, along with a higher binding energy (HBE) oxygen peak associated with the formation of magnesium hydroxide at the surface of the MgO film upon air exposure. Increasing the substrate temperature during deposition was shown to improve the stochiometry of the films. Based on electrical characterisation of Pd/MgO/Si(100) capacitor structures, the dielectric constant of the MgO layer is calculated as 8.1.