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Dive into the research topics where Eiichi Sano is active.

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Featured researches published by Eiichi Sano.


IEEE Transactions on Microwave Theory and Techniques | 1990

Characterization of MIS structure coplanar transmission lines for investigation of signal propagation in integrated circuits

Tsugumichi Shibata; Eiichi Sano

A full-wave analysis of metal-insulator-semiconductor (MIS) structure micron coplanar transmission lines on doped semiconductor substrates is carried out using a finite-difference time-domain approach. Metal conductor loss is taken into account in the analysis. Line parameters and electromagnetic field distributions are calculated over a wide frequency range involving slow-wave and dielectric quasi-transverse-electromagnetic mode limits. Measurements of these line parameters, varying substrate resistivity from 1 to 1000 Omega -cm, in the frequency range up to 40 GHz are also presented, and these agree with the analysis quite well. On the basis of these results, an equivalent circuit line model is induced and some considerations on the relationship between line structure and properties made. >


Applied Physics Express | 2010

Vertical Surrounding Gate Transistors Using Single InAs Nanowires Grown on Si Substrates

Tomotaka Tanaka; Katsuhiro Tomioka; Shinjiroh Hara; Junichi Motohisa; Eiichi Sano; Takashi Fukui

We report on the fabrication and characterization of vertical InAs nanowire channel field effect transistors (FETs) with high-k/metal gate-all-around structures. Single InAs nanowires were grown on Si substrates by the selective-area metalorganic vapor phase epitaxy method. The resultant devices exhibited n-channel FET characteristics with a threshold voltage of around -0.1 V. The best device exhibited maximum drain current (I DSmax/w G), maximum transconductance (g mmax/w G), on–off ratio (I ON/OFF), subthreshold slope (SS) of 83 µA/µm, 83 µS/µm, 104, and 320 mV/decade, respectively, for a nanowire diameter of 100 nm.


Journal of Applied Physics | 1989

Subpicosecond sampling using a noncontact electro-optic probe

T. Nagatsuma; T. Shibata; Eiichi Sano; A. Iwata

This paper discusses a theoretical as well as experimental study of the performance of electro‐optic sampling using a noncontact electro‐optic probe, i.e., external electro‐optic sampling. Sensitivity, temporal resolution, and the capacitive loading effect of this system are calculated by analysis of a static electric field coupled to an electro‐optic crystal placed in close proximity to transmission lines such as microstrip lines and coplanar strips. Full‐wave analysis is also applied to investigate effect of the electro‐optic crystal on the transient property of high‐speed electrical signals. Based on these analytical considerations, we have developed an external electro‐optic sampling system using precise probe‐positioning technology, which improves the measurement reproducibility. A temporal resolution of 0.5 ps and a spatial resolution of 1 μm are confirmed with this system.


Optics Letters | 2005

Effect of a thin dielectric layer on terahertz transmission characteristics for metal hole arrays.

Masaki Tanaka; Fumiaki Miyamaru; Masanori Hangyo; Takeshi Tanaka; Masamichi Akazawa; Eiichi Sano

We studied the role of surface-plasmon polaritons (SPPs) in a bandpass transmission property of two-dimensional metal hole arrays (2D-MHAs) by investigating the effect of thin dielectric layers on the 2D-MHA surfaces. We measured zero-order transmission spectra of the 2D-MHAs by changing the thickness of the dielectric layer and found that the bandpass transmission peak shifted to the lower-frequency side with increasing layer thickness, owing to the change of the resonant frequency of the SPP. This result shows that SPPs play a crucial role in the transmission property of 2D-MHAs in the terahertz region.


IEEE Journal of Solid-state Circuits | 1994

A novel high-speed latching operation flip-flop (HLO-FF) circuit and its application to a 19-Gb/s decision circuit using a 0.2-/spl mu/m GaAs MESFET

Koichi Murata; Taiichi Otsuji; Eiichi Sano; Masanobu Ohhata; Minoru Togashi; Masao Suzuki

This paper describes a novel high-speed flip-flop circuit named the High-speed Latching Operation Flip-Flop (HLO-FF) for GaAs Low-power Source-Coupled FET Logic (LSCFL). We reveal the high-speed operation mechanism of the HLO-FF using newly proposed analytical propagation delay time expressions. A design methodology for series-gated master slave flip-flops and HLO-FFs based on these expressions is also proposed. A SPICE simulation and the fabrication of two decision ICs confirm the accuracy of our analytical method and the high-speed operation of a HLO-FF decision circuit at 19 Gb/s. >


IEEE Journal of Selected Topics in Quantum Electronics | 1996

10-80-Gb/s highly extinctive electrooptic pulse pattern generation

Taiichi Otsuji; Makoto Yaita; Tadao Nagatsuma; Eiichi Sano

A pulse-rate-tunable, highly extinctive, ultra-highspeed electrooptic pulse pattern generator has been developed. The optical short pulse generation is based on sinusoidal electrooptic phase modulation and linear chirp compensation using a dispersive medium. Filtering the nonlinear chirp components generated by sinusoidal phase modulation drastically improves the pulse extinction, and makes nearly background-free picosecond pulsation over a wide pulse-rate range even when the group delay dispersion value is fixed.


Japanese Journal of Applied Physics | 2004

Al2O3 insulated-gate structure for AlGaN/GaN heterostructure field effect transistors having thin AlGaN barrier layers

Tamotsu Hashizume; S Sanguan Anantathanasarn; Noboru Negoro; Eiichi Sano; Hideki Hasegawa; Kazuhide Kumakura

An Al2O3 insulated-gate (IG) structure was utilized for controlling the surface potential and suppressing the gate leakage in Al0.2Ga0.8N/GaN heterostructure field effect transistors (HFETs) having thin AlGaN barrier layers (less than 10 nm). In comparison with the Schottky-gate devices, the Al2O3 IG device showed successful gate control of drain current up to VGS = +4 V without leakage problems. The threshold voltage in the Al2O3 IG HFET was about -0.3 V, resulting in the quasi-normally-off mode operation.


Applied Physics Letters | 2006

Grating-bicoupled plasmon-resonant terahertz emitter fabricated with GaAs-based heterostructure material systems

Taiichi Otsuji; Y. M. Meziani; Mitsuhiro Hanabe; Takuma Ishibashi; Tomohiro Uno; Eiichi Sano

A grating-bicoupled plasmon-resonant terahertz emitter was fabricated using InGaP∕InGaAs∕GaAs heterostructure material systems. The device structure is based on a high-electron mobility transistor and incorporates doubly interdigitated grating gates that periodically localize the two-dimensional (2D) plasmon in 100nm regions with a submicron interval. Photoexcited electrons, injected to the 2D plasmon cavities, extensively promoted the plasmon instability, resulting in observation of emission of terahertz electromagnetic radiation at room temperature.


IEEE Transactions on Microwave Theory and Techniques | 1997

Optical repeater circuit design based on InAlAs/InGaAs HEMT digital IC technology

Mikio Yoneyama; Akihide Sano; Kazuo Hagimoto; Taiichi Otsuji; Koichi Murata; Y. Imai; Satoshi Yamaguchi; Takatomo Enoki; Eiichi Sano

This paper describes an optical repeater circuit that uses an InAlAs/InGaAs HEMT digital integrated circuit (IC) chip set. The chip set includes a 64-Gb/s 2:1 multiplexer (MUX), a 40-Gb/s demultiplexer (DEMUX), a 46-Gb/s decision circuit (DEC), and a 48-GHz frequency divider (DIV). Electrically multiplexed and demultiplexed 40-Gb/s 300-km transmission is successfully demonstrated.


ieee gallium arsenide integrated circuit symposium | 1996

40-Gbit/s ICs for future lightwave communications systems

Taiichii Otsuji; Yuhki Imai; Eiichi Sano; Shunji Kimura; Satoshi Yamaguchi; Mikio Yoneyama; Takatomo Enoki; Yohtaro Umeda

This paper reviews recent advances in 40-Gbit/s class analog and digital ICs developed at our laboratories for future lightwave communications systems. A 0.1-/spl mu/m gate InAlAs/InGaAs HEMT with InP recess etch stopper was adopted mainly for IC fabrication. Fabricated ICs demonstrate excellent data-multiplexing, demultiplexing and amplifying operation at 40 Gbit/s.

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Koichi Murata

Nippon Telegraph and Telephone

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Takuya Nishimura

Kyushu Institute of Technology

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