Eiji Yamanaka

Improvement of EUVL mask structure with black border of etched multilayer

For EUVL mask with thinner absorber, it is necessary to make black border area in order to suppress the leakage of the EUV light from the adjacent exposure shots Black border of etched multilayer is promising structure in terms of light-shield capability and mask process simplicity. However, EUVL masks with this structure do not have electrical conductivity between the inside and the outside of black border. Inspection area including device patterns belongs to the inside of the black border. In case that quality check for EUVL masks is performed with E-beam inspection, the area is floating. As a result, electrification to mask pattern occurs and causes degradation of E-beam inspection accuracy when the mask is inspected by E-beam inspection tool. In this paper, we refine EUVL mask structure with black border of etched multilayer in order to improve electrical conductivity. We will show evaluation results of E-beam inspection accuracy, and discuss specifications of electrically conductive black border area.

Mask pattern quality assurance based on lithography simulation with fine pixel SEM image

We evaluated the accuracy of the simulation based on mask edge extraction for mask pattern quality assurance. Edge extraction data were obtained from SEM images by use of TOPCON UR-6080 in which high resolution (pixel size of 2nm) and fine pixel SEM image (8000 x 8000 pixels) acquisition is possible. The repeatability of the edge extraction and its impact on wafer image simulation were studied for a normal 1D CD prediction and an edge placement error prediction. The reliability of the simulation was studied by comparing with actual experimental exposure results with an ArF scanner. In the normal 1D CD prediction, we successfully obtained good repeatability and reliability. In 65nm node, we can predict a wafer CD with the accuracy of less than 1 nm using the simulation based on mask edge extraction. In the edge placement error prediction mode, the simulation accuracy is ~5 nm including edge extraction repeatability and the uncertainty of lithography simulation model. The simulation with edge extraction more accurately predicts the resist pattern at line-end in which the actual mask pattern may be varied from the mask target (CAD) than a conventional simulation in which CAD is used as a mask pattern. This result supports the view that the wafer simulation with edge extraction is useful for mask pattern quality assurance because it can consider actual mask pattern shape.

Accuracy of mask pattern contour extraction with fine-pixel SEM images

The specification of photomask patterns is defined for each semiconductor device technology node based on the ITRS (International Technology Roadmap for Semiconductors). The quality of the photomask patterns has been managed by using a metrology tool for CD (Critical Dimension) and an inspection tool for pattern shape. According to shrinkage of semiconductor device patterns, the lithography margin has gradually become smaller. Consequently, the quality of photomask patterns has been managed by observing small lithography margin patterns in addition to the conventional quality management patterns with the conventional metrology tool. Furthermore, recently, as each successive device generation has become shorter, rapid improvement of not only turnaround time of photomask manufacturing but also yield of semiconductor device manufacturing has become necessary. Therefore, the importance of the flexible mask specifications concept is increasing. The quality of photomask patterns with respect to the specifications is judged in terms of pass/fail based on the allowable lithography margin. The methodology is that small lithography margin patterns are selected, micrographs of the selected photomask patterns are acquired by a metrology tool, photomask pattern contours are extracted with the micrographs, resist patterns exposed on Si wafer are simulated by using the photomask pattern contours with lithography simulation under actual exposure conditions, the lithography margin is calculated and the quality of the photomask is judged in terms of pass/fail criteria based on the lithography margin for each generation, device and layer. For management of the quality of photomask patterns based on the flexible mask specifications, it is necessary to measure two-dimensional patterns such as hot-spot patterns for each critical layer in devices having small lithography margin. Therefore, in order to manage quality in the case of flexible mask specifications, a two-dimensional photomask pattern contour extraction tool was studied and developed. The photomask pattern contour extraction tool realizes the combination of acquisition of fine-pixel SEM images of the photomask patterns in wide field and extraction of photomask pattern contours by using the acquired fine-pixel SEM images. There have been many reports on the repeatability and reliability of CD and two-dimensional pattern metrology tools based on the conventional specifications. However, there are very few reports on the repeatability and reliability of photomask pattern metrology tools based on flexible mask specifications. In this paper, using small lithography margin patterns, firstly, the fine-pixel SEM images of photomask patterns are acquired. Secondly, contours of the photomask patterns are extracted with the SEM images. Thirdly, contours of resist patterns on Si wafer are simulated with lithography simulation under actual exposure condition by using the actual photomask pattern contours. Finally, the lithography margin is calculated by using FEM (Focus Exposure Matrix) for the simulated contours of resist patterns. This flow is repeated. The lithography margin with this flow is compared with that of actual exposed wafers. Repeatability and reliability of the lithography margin is evaluated. As a result, accuracy of the photomask pattern contour extraction tool is discussed.

The measurement capabilities of cross-sectional profile of Nanoimprint template pattern using small angle x-ray scattering

Nanoimprint lithography (NIL) is one of the most potential candidates for the next generation lithography for semiconductor. It will achieve the lithography with high resolution and low cost. High resolution of NIL will be determined by a high definition template. Nanoimprint lithography will faithfully transfer the pattern of NIL template to the wafer. Cross-sectional profile of the template pattern will greatly affect the resist profile on the wafer. Therefore, the management of the cross-sectional profile is essential. Grazing incidence small angle x-ray scattering (GI-SAXS) technique has been proposed as one of the method for measuring cross-sectional profile of periodic nanostructure pattern. Incident x-rays are irradiated to the sample surface with very low glancing angle. It is close to the critical angle of the total reflection of the x-ray. The scattered x-rays from the surface structure are detected on a two-dimensional detector. The observed intensity is discrete in the horizontal (2θ) direction. It is due to the periodicity of the structure, and diffraction is observed only when the diffraction condition is satisfied. In the vertical (β) direction, the diffraction intensity pattern shows interference fringes reflected to height and shape of the structure. Features of the measurement using x-ray are that the optical constant for the materials are well known, and it is possible to calculate a specific diffraction intensity pattern based on a certain model of the cross-sectional profile. The surface structure is estimated by to collate the calculated diffraction intensity pattern that sequentially while changing the model parameters with the measured diffraction intensity pattern. Furthermore, GI-SAXS technique can be measured an object in a non-destructive. It suggests the potential to be an effective tool for product quality assurance. We have developed a cross-sectional profile measurement of quartz template pattern using GI-SAXS technique. In this report, we will report the measurement capabilities of GI-SAXS technique as a cross-sectional profile measurement tool of NIL quartz template pattern.

A photomask defect evaluation system

Photomasks are currently inspected based on the standard of defect size. A shortcoming of this standard is that the type of defects which do not impact on a wafer, could be detected as impermissible defects. All of them are subject to repair works and some of them require further inspection by AIMS. This is one of the factors that are pushing down the yield and the turnaround time (TAT) of mask manufacturing. An effective way to improve this situation will be to do the repair works selectively on the defects that are predicted to inflict a functional damage on a wafer. In this report, we will propose a defect evaluation system named ADRES (Advanced Photomask Defect Repair Evaluation System), featuring a function to extract edges from a mask SEM image to be passed on to a litho-simulation. A distinctive point of our system is the use of a mask SEM image with a high resolution.

Fine pixel SEM image for EUV mask pattern 3D quality assurance based on lithography simulation

Optical proximity correction (OPC) is still an essential technology for critical dimension (CD) control in Extreme Ultra Violet (EUV) lithography. For quality assurance of EUV mask pattern, a metrology of complicated two-dimensional (2D) OPC patterns is important. Moreover, the side wall angle management of a mask pattern becomes important in EUV lithography because exposure light is diagonally incident on a mask pattern. The quality assurance of EUV mask pattern requires the pattern edge extraction including the side wall angle. We had developed an SEM which is one of the key factors of this three-dimensional (3D) quality assurance method. The high accuracy measurement of a side wall angle using Tilting and Moving Objective Lens (T-MOL) is most feature of this SEM. Employing this SEM, we will add the side wall angle information to the system for guaranteeing 2D OPC patterns before shipping the mask to a wafer factory. In this paper, we report the study about the management of the side wall angle of an EUV mask pattern. And then we report the evaluation results of the side wall angle measurement system with a tilted fine pixel SEM image that satisfies the requirement of the management.

Reticle SEM specifications required for lithography simulation

We investigated the specifications of scanning electron microscope required for the lithography simulation based on the edge data extracted from an actual reticle pattern in the assurance of reticle pattern in which two-dimensional optical proximity correction is applied. Impacts of field of view, positioning error and image distortion on a lithography simulation were studied experimentally. For the reticle pattern assurance in hp90, the field of view of larger than 16 μm squares, the positioning error within +/- 1 μm and the magnification error of less than 0.3% are needed. Under these conditions, wafer image can be predicted with sufficient accuracy by the simulation.

Mask defect specifications with fail-bit-map analysis

A new mask methodology of mask defect specifications by fail-bit-map (FBM) analysis of LSI devices was proposed. In this paper, concept of new mask defect specifications based on the FBM analysis is shown and impacts on LSI devices of mask defects are studied and the new methodology for next generation is applied. The new mask defect specifications were implemented in a gate-level mask with defects programmed into a 0.175μm-rule DRAM fabrication process, as follows, Firstly, the programmed defects varied in terms of the types, locations and sizes were designed into the memory cell area on the 0.175μm-rule DRAM gate-level mask. Secondly, the gate-level mask with programmed defects was fabricated with conventional mask process flow and the actual mask defect sizes were measured. Thirdly, exposures of the gate-level mask were carried out with conventional 0.175μm-rule DRAM process. Finally, the large impacts on CDs caused by mask defect printability on wafers were clarified and FBM analysis was performed to characterize the relationship among the actual mask defect variations, the CD variations and electrical function of 0.175μm-rule DRAM. This relationship can facilitate determination of the mask defect specifications on 0.175μm-rule DRAM and also likely contribute to estimate next-generation defect specifications. According to the results of the above procedure, the mask defect specifications for opaque defects should be generally tighter than those for clear defects in view of the printability on the wafers and the FBM analysis. Nevertheless, the FBM results suggested that current mask inspection sensitivity for clear defects was too high. With the new methodology, in regard to the impacts of mask defects not only on wafer CDs but also on LSI devices, we have succeeded in obtaining useful results for the mask defect specifications.

The capability of measuring cross-sectional profile for hole patterns in nanoimprint templates using small-angle x-ray scattering

Nanoimprint lithography (NIL) is one of the highest potential candidates for next generation lithography in semiconductors. NIL is very useful technology for pattern fabrication in high resolution compared to conventional optical lithography. NIL technology makes use of replication from quartz templates. The cross-sectional profile of the template is directly transferred to the resist profile on a wafer. Accordingly, the management of the cross-sectional profile on the template pattern is much more important than on each photomask. In our previous report, we had studied the performance of measuring cross-sectional profiles using grazing-incidence small-angle X-ray scattering (GISAXS). GISAXS has made it possible to analyze the repeated nanostructure patterns with a 2D X-ray scattering pattern. After various researches, we found the application is very effective in the method of cross-sectional profiling of sub-20 nm half-pitch lines-and-spaces (LS) patterns. In this report, we investigated the capabilities of measuring cross-sectional profiles for hole patterns using GISAXS. Since the pattern density of hole patterns is much lower than that of LS patterns, the intensity of X-ray scattering in hole measurements is much lower. We optimized some measurement conditions to build the hole measurement system. Finally, the results suggested that 3D profile measurement of hole pattern using GISAXS has sufficient performance to manage the cross-sectional profile of template. The measurement system using GISAXS for measuring 3D profiles establishes the cross-sectional profile management essential for the production of high quality quartz hole templates.

High-performance fabrication process for 2xnm hole-NIL template production

UV nano imprint lithography (UV-NIL) has high-throughput and cost-effective for complex nano-scale patterns and is considered as a candidate for next generation lithography tool. In addition, NIL is the unmagnified lithography and contact transfer technique using template. Therefore, the lithography performance depends greatly on the quality of the template pattern. According to ITRS 2013, the minimum half pitch size of Line and Space (LS) pattern will reach 1x nm level within next five years. On the other hand, in hole pattern, half pith of 2x nm level will be required in five years. Pattern shrink rate of hole pattern size is slower than LS pattern, but shot counts increase explosively compared to LS pattern due to its data volume. Therefore, high throughput and high resolution EB lithography process is required. In previous study, we reported the result of hole patterning on master template which has high resolution resist material and etching process. This study indicated the potential for fabricating 2xnm hole master template [1]. After above study, we aim at fabricating the good quality of 2xnm master template which is assured about defect, CD uniformity(CDU), and Image placement(IP). To product high quality master template, we develop not only high resolution patterning process but also high accuracy quality assurance technology. We report the development progress about hole master template production.