Einar Sveinbjörnsson

Interfaces between 4H-SiC and SiO2: Microstructure, nanochemistry, and near-interface traps

We report on electrical and microscopic investigations aimed to clarify the origin of near-interface traps (NITs) in metal–silicon dioxide–4H-silicon carbide structures. Using capacitance–voltage and thermal dielectric relaxation current (TDRC) analysis we investigated NITs close to the 4H-SiC conduction-band edge in differently prepared thermal and deposited oxides and found that the traps give rise to two characteristic TDRC signatures belonging to two groups of trap levels. The total trapped charge exceeds 1×1013cm−2. The observed density and energy distribution of these traps are nearly identical in all thermal and deposited oxides investigated, suggesting that the NITs belong to intrinsic defects at the SiO2∕SiC interface which are readily formed during oxide deposition or thermal oxidation of 4H-SiC. Using high-resolution electron microscopy combined with nanochemical analysis (electron energy-loss near-edge spectroscopy and energy-filtered transmission electron microscopy) we investigated the SiO2∕...

Investigation of the interface between silicon nitride passivations and AlGaN/AlN/GaN heterostructures by C"V… characterization of metal-insulator-semiconductor-heterostructure capacitors

Capacitance-voltage [C(V)] measurements of metal-insulator-semiconductor-heterostructure capacitors are used to investigate the interface between silicon nitride passivation and AlGaN/AlN/GaN heterostructure material. AlGaN/AlN/GaN samples having different silicon nitride passivating layers, deposited using three different deposition techniques, are evaluated. Different interface state distributions result in large differences in the C(V) characteristics. A method to extract fixed charge as well as traps from the C(V) characteristics is presented. Rough estimates of the emission time constants of the traps can be extracted by careful analysis of the C(V) characteristics. The fixed charge is positive for all samples, with a density varying between 1.3 x 10(12) and 7.1 x 10(12) cm(-2). For the traps, the peak density of interface states is varying between 16 x 10(12) and 31 x 10(12) cm(-2) eV(-1) for the three samples. It is concluded that, of the deposition methods investigated in this report, the low pressure chemical vapor deposited silicon nitride passivation shows the most promising results with regards to low densities of interface states

A strong reduction in the density of near-interface traps at the SiO2∕4H‐SiC interface by sodium enhanced oxidation

This paper demonstrates how sodium enhanced oxidation of Si face 4H‐SiC results in removal of near-interface traps at the SiO2∕4H‐SiC interface. These detrimental traps have energy levels close to the SiC conduction band edge and are responsible for low electron inversion channel mobilities (1–10cm2∕Vs) in Si face 4H‐SiC metal-oxide-semiconductor field effect transistors. The presence of sodium during oxidation increases the oxidation rate and suppresses formation of these near-interface traps resulting in high inversion channel mobility of 150cm2∕Vs in such transistors. Sodium is incorporated by using carrier boats made of sintered alumina during oxidation or by deliberate sodium contamination of the oxide during the formation of the SiC∕SiO2 interface.

High field-effect mobility in n-channel Si face 4H-SiC MOSFETs with gate oxide grown on aluminum ion-implanted material

We report investigations of Si face 4H-SiC MOSFETs with aluminum (Al) ion-implanted gate channels. High-quality SiO/sub 2/-SiC interfaces are obtained both when the gate oxide is grown on p-type epitaxial material and when grown on ion-implanted regions. A peak field-effect mobility of 170 cm/sup 2//V/spl middot/s is extracted from transistors with epitaxially grown channel region of doping 5/spl times/10/sup 15/ cm/sup -3/. Transistors with implanted gate channels with an Al concentration of 1/spl times/10/sup 17/ cm/sup -3/ exhibit peak field-effect mobility of 100 cm/sup 2//V/spl middot/s, while the mobility is 51 cm/sup 2//V/spl middot/s for an Al concentration of 5/spl times/10/sup 17/ cm/sup -3/. The mobility reduction with increasing acceptor density follows the same functional relationship as in n-channel Si MOSFETs.

Thermal emission of electrons from selected s-shell configurations in InAs/GaAs quantum dots

The thermal emission of electrons from self-assembled InAs/GaAs quantum dots, prepared by molecular-beam epitaxy, with an average base/height size of 20 nm/11 nm in Schottky diodes has been investigated using deep level transient spectroscopy (DLTS). By applying an appropriate set of voltage pulses across the Schottky diode, the two different s-electron configurations have been investigated separately. This avoids the problem of interference between overlapping peaks in DLTS data. We find that a difference in activation energy for the thermal electron emission between the two configurations agrees with expected variation in electron energy levels due to the size distribution of the quantum dots.

Phosphorus diffusion gettering of gold in silicon: The reversibility of the gettering process

Phosphorus diffusion gettering of gold in silicon is a reversible process with strong temperature and phosphorus concentration dependence. We show explicitly that gold diffuses back and forth between the highly doped phosphorus layer and the bulk of the material when the annealing temperature is varied. This was investigated using secondary‐ion mass spectroscopy to study the gold within the gettering layer and using deep level transient spectroscopy to estimate the gold content in the bulk. We observed no internal gettering or outdiffusion of gold as long as the gold concentration is below the solubility limit. The concentration profile of gold after successful gettering follows the phosphorus profile but virtually all the gold atoms are found in the region where the phosphorus concentration exceeds ∼3×1019 cm−3. This is related to a large solubility enhancement of gold when the phosphorus concentration is above 3×1019 cm−3. The simplest explanation for the observed gettering mechanism is formation of gol...

Trap and Inversion Layer Mobility Characterization Using Hall Effect in Silicon Carbide-Based MOSFETs With Gate Oxides Grown by Sodium Enhanced Oxidation

Low-temperature MOS-gated Hall measurements and gated diode capacitance-voltage (C-V) measurements were performed to characterize both trap density and Hall mobility on 4H-silicon carbide MOSFETs with gate oxides grown by sodium enhanced oxidation (SEO) and thermally grown in N2O. The interface trap density Dit was determined close to the conduction band edge by Hall effect measurements to be 2?1013 cm-2 ? eV-1 in the N2O-based oxide sample and 1?1011 cm-2 ? eV-1 in the SEO sample. The presence of these interface trap states above the conduction band edge suggest that they are near interface oxide trap states rather than conventional fast interface trap states. The threshold voltage changes with temperature in MOSFETs with gate oxides grown thermally with N2O but not significantly in MOSFETs with gate oxides grown by SEO. The superior threshold voltage stability at low temperatures in the SEO-based MOSFET compared to the N2O oxidation-based MOSFET is due to lower trap density near the conduction band edge. Gated diode C-V measurements showed that MOSFETs with gate oxide grown by SEO had a higher density of interface traps (2.2?1012 cm-2) deeper in the bandgap compared to MOSFETs with gate oxides thermally grown in N2O (1.4?1012 cm-2). A maximum Hall mobility of 65 cm2/V ? s was measured in the SEO-based MOSFET, and 16 cm2/V ? s was measured on the N2O oxidation-based MOSFET at 225 K. The mobility correlates well with the interface trap density close to the conduction band edge as measured by Hall effect measurements but does not correlate with gated diode C-V measurements of traps deeper in the band gap. Temperature-dependent gated Hall mobility measurements were used to show that the inversion layer mobility in the SEO samples were limited by Coulomb scattering from interface trapped charge and surface roughness scattering but not by phonon scattering.

Similarities in the electrical properties of transition metal-hydrogen complexes in silicon

We review our recent studies on the reactions of hydrogen with transition-metals (Pd, Pt, Ag, and Au) in crystalline Si. Hydrogen was incorporated into the samples by wet-chemical etching. Deep-level transient spectroscopy (DLTS) on Schottky diodes reveals several transition metal‐hydrogen complexes in n- and p-type samples. From DLTS profiling, we are able to estimate the number i of hydrogen atoms in the TM‐Hi complexes. All complexes with i 1, 2 are electrically active. Striking similarities are found for isoelectronic complexes, e.g. Pt‐H2 and Au‐H1. Transition metal complexes with more than three hydrogen atoms are likely to be electrically passive. All hydrogen related complexes disappear after heat treatments above 600 K for several hours.

Surface passivation oxide effects on the current gain of 4H-SiC bipolar junction transistors

Effects of surface recombination on the common emitter current gain have been studied in 4H-silicon carbide (SiC) bipolar junction transistors (BJTs) with passivation formed by conventional dry oxidation and with passivation formed by dry oxidation in nitrous oxide (N2O) ambient. A gradual reduction of the current gain was found after removal of the passivation oxide followed by air exposure. Comparison of the measurement results for two different passivated BJTs indicates that the BJTs with passivation by dry oxidation in nitrous oxide (N2O) ambient show a half order of magnitude reduction of base current, resulting in a half order of magnitude increase of current gain at low currents. This improvement of current gain is attributed to reduced surface recombination caused by reduced interface trap densities at the base-emitter junction sidewall.

Novel hydrogen‐gold‐related deep acceptor in n‐type silicon

Using deep level transient spectroscopy (DLTS) on gold‐doped n‐type Czochralski (CZ) and float zone (FZ) silicon we observe a new gold‐related acceptor level (G) with an activation energy ΔE=0.19 eV and an electron capture cross section σn=1×10−17 cm2. The center is formed after hydrogenation by etching a few microns off the sample surface using HF:HNO3 based etch. We suggest that there are (at least) two possible Au‐H complex centers, one which is electrically inactive and another which gives rise to an acceptor level (ΔE=0.19 eV) in the band gap of n‐type silicon. The electrically active center anneals out at 250 °C while the electrically inactive one is more stable and has been observed earlier in remote plasma hydrogenation experiments performed at 150–350 °C.