Fredrik Allerstam

Investigation of the interface between silicon nitride passivations and AlGaN/AlN/GaN heterostructures by C"V… characterization of metal-insulator-semiconductor-heterostructure capacitors

Capacitance-voltage [C(V)] measurements of metal-insulator-semiconductor-heterostructure capacitors are used to investigate the interface between silicon nitride passivation and AlGaN/AlN/GaN heterostructure material. AlGaN/AlN/GaN samples having different silicon nitride passivating layers, deposited using three different deposition techniques, are evaluated. Different interface state distributions result in large differences in the C(V) characteristics. A method to extract fixed charge as well as traps from the C(V) characteristics is presented. Rough estimates of the emission time constants of the traps can be extracted by careful analysis of the C(V) characteristics. The fixed charge is positive for all samples, with a density varying between 1.3 x 10(12) and 7.1 x 10(12) cm(-2). For the traps, the peak density of interface states is varying between 16 x 10(12) and 31 x 10(12) cm(-2) eV(-1) for the three samples. It is concluded that, of the deposition methods investigated in this report, the low pressure chemical vapor deposited silicon nitride passivation shows the most promising results with regards to low densities of interface states

A strong reduction in the density of near-interface traps at the SiO2∕4H‐SiC interface by sodium enhanced oxidation

This paper demonstrates how sodium enhanced oxidation of Si face 4H‐SiC results in removal of near-interface traps at the SiO2∕4H‐SiC interface. These detrimental traps have energy levels close to the SiC conduction band edge and are responsible for low electron inversion channel mobilities (1–10cm2∕Vs) in Si face 4H‐SiC metal-oxide-semiconductor field effect transistors. The presence of sodium during oxidation increases the oxidation rate and suppresses formation of these near-interface traps resulting in high inversion channel mobility of 150cm2∕Vs in such transistors. Sodium is incorporated by using carrier boats made of sintered alumina during oxidation or by deliberate sodium contamination of the oxide during the formation of the SiC∕SiO2 interface.

High field-effect mobility in n-channel Si face 4H-SiC MOSFETs with gate oxide grown on aluminum ion-implanted material

We report investigations of Si face 4H-SiC MOSFETs with aluminum (Al) ion-implanted gate channels. High-quality SiO/sub 2/-SiC interfaces are obtained both when the gate oxide is grown on p-type epitaxial material and when grown on ion-implanted regions. A peak field-effect mobility of 170 cm/sup 2//V/spl middot/s is extracted from transistors with epitaxially grown channel region of doping 5/spl times/10/sup 15/ cm/sup -3/. Transistors with implanted gate channels with an Al concentration of 1/spl times/10/sup 17/ cm/sup -3/ exhibit peak field-effect mobility of 100 cm/sup 2//V/spl middot/s, while the mobility is 51 cm/sup 2//V/spl middot/s for an Al concentration of 5/spl times/10/sup 17/ cm/sup -3/. The mobility reduction with increasing acceptor density follows the same functional relationship as in n-channel Si MOSFETs.

Trap and Inversion Layer Mobility Characterization Using Hall Effect in Silicon Carbide-Based MOSFETs With Gate Oxides Grown by Sodium Enhanced Oxidation

Low-temperature MOS-gated Hall measurements and gated diode capacitance-voltage (C-V) measurements were performed to characterize both trap density and Hall mobility on 4H-silicon carbide MOSFETs with gate oxides grown by sodium enhanced oxidation (SEO) and thermally grown in N2O. The interface trap density Dit was determined close to the conduction band edge by Hall effect measurements to be 2?1013 cm-2 ? eV-1 in the N2O-based oxide sample and 1?1011 cm-2 ? eV-1 in the SEO sample. The presence of these interface trap states above the conduction band edge suggest that they are near interface oxide trap states rather than conventional fast interface trap states. The threshold voltage changes with temperature in MOSFETs with gate oxides grown thermally with N2O but not significantly in MOSFETs with gate oxides grown by SEO. The superior threshold voltage stability at low temperatures in the SEO-based MOSFET compared to the N2O oxidation-based MOSFET is due to lower trap density near the conduction band edge. Gated diode C-V measurements showed that MOSFETs with gate oxide grown by SEO had a higher density of interface traps (2.2?1012 cm-2) deeper in the bandgap compared to MOSFETs with gate oxides thermally grown in N2O (1.4?1012 cm-2). A maximum Hall mobility of 65 cm2/V ? s was measured in the SEO-based MOSFET, and 16 cm2/V ? s was measured on the N2O oxidation-based MOSFET at 225 K. The mobility correlates well with the interface trap density close to the conduction band edge as measured by Hall effect measurements but does not correlate with gated diode C-V measurements of traps deeper in the band gap. Temperature-dependent gated Hall mobility measurements were used to show that the inversion layer mobility in the SEO samples were limited by Coulomb scattering from interface trapped charge and surface roughness scattering but not by phonon scattering.

Surface passivation oxide effects on the current gain of 4H-SiC bipolar junction transistors

Effects of surface recombination on the common emitter current gain have been studied in 4H-silicon carbide (SiC) bipolar junction transistors (BJTs) with passivation formed by conventional dry oxidation and with passivation formed by dry oxidation in nitrous oxide (N2O) ambient. A gradual reduction of the current gain was found after removal of the passivation oxide followed by air exposure. Comparison of the measurement results for two different passivated BJTs indicates that the BJTs with passivation by dry oxidation in nitrous oxide (N2O) ambient show a half order of magnitude reduction of base current, resulting in a half order of magnitude increase of current gain at low currents. This improvement of current gain is attributed to reduced surface recombination caused by reduced interface trap densities at the base-emitter junction sidewall.

Transient Simulation of Microwave SiC MESFETs With Improved Trap Models

Measured and simulated transient characteristics of a SiC metal-semiconductor field-effect transistor are compared. Self-heating, gate tunneling, substrate, and surface traps are taken into account in the simulations. By explicitly filling surface traps at the vicinity of the gate during pinchoff, close correspondence between simulated and measured gate lags is achieved.

Comparison between oxidation processes used to obtain the high inversion channel mobility in 4H-SiC MOSFETs

In this work two oxidation methods aimed at improving the silicon face 4H-SiC/SiO2 interface are compared. One is an oxidation in N2O performed in a quartz tube using quartz sample holders and the other is a dry oxidation performed in an alumina tube using alumina sample holders. In n-type metal oxide semiconductor (MOS) capacitors the interface state density near the SiC conduction band edge is estimated using capacitance–voltage (C–V) and thermal dielectric relaxation current (TDRC) measurements. N-channel metal oxide semiconductor field effect transistors (MOSFETs) are characterized by current–voltage (I–V) techniques and the inversion channel mobility is extracted. It is shown that the high inversion channel mobility (154 cm2 V−1 s−1) seen in samples oxidized using alumina correlates with a low interface trap density (3.6 × 1011 cm−2). In the case of N2O oxidation the mobility is lower (24 cm2 V−1 s−1) and the interface trap density is higher (1.6 × 1012 cm−2). Room temperature C–V measurements are of limited use when studying traps near the conduction band edge in MOS structures while the TDRC measurement technique gives a better estimate of their density.

1200 V 4H-SiC BJTs with a Common Emitter Current Gain of 60 and Low On-resistance

This paper reports a 4H-SiC bipolar junction transistor (BJT) with a breakdown voltage (BVCEO) of 1200 V, a maximum current gain (β) of 60 and the low on-resistance (Rsp_on)of 5.2 mΩcm2. The high gain is attributed to an improved surface passivation SiO2 layer which was grown in N2O ambient in a diffusion furnace. The SiC BJTs with passivation oxide grown in N2O ambient show less emitter size dependence than reference SiC BJTs, with conventional SiO2 passivation, due to a reduced surface recombination current. SiC BJT devices with an active area of 1.8 mm × 1.8 mm showed a current gain of 53 in pulsed mode and a forward voltage drop of VCE=2V at IC=15 A (JC=460 A/cm2).

Sodium Enhanced Oxidation of Si-Face 4H-SiC: A Method to Remove Near Interface Traps

We demonstrate how sodium enhanced oxidation of Si face 4H-SiC results in removal of near-interface traps at the SiO2/4H-SiC interface. These detrimental traps have energy levels close to the SiC conduction band edge and are responsible for low electron inversion channel mobilities (1-10 cm2/Vs) in Si face 4H-SiC metal-oxide-semiconductor field effect transistors. The presence of sodium during oxidation increases the oxidation rate and suppresses formation of these nearinterface traps resulting in high inversion channel mobility of 150 cm2/Vs in such transistors. Sodium can be incorporated by using carrier boats made of sintered alumina during oxidation or by deliberate sodium contamination of the oxide during formation of the SiC/SiO2 interface.

High channel mobility 4H-SiC MOSFETs

We report investigations of MOS and MOSFET devices using a gate oxide grown in the presence of sintered alumina. In contrast to conventionally grown dry or wet oxides these oxides contain orders of magnitude lower density of near-interface traps at the SiO2/SiC interface. The reduction of interface traps is correlated with enhanced oxidation rate. The absence of near-interface traps makes possible fabrication of Si face 4H-SiC MOSFETs with peak field effect mobility of about 150 cm2/Vs. A clear correlation is observed between the field effect mobility in n-channel MOSFETs and the density of interface states near the SiC conduction band edge in n-type MOS capacitors. Stable operation of such normally-off 4H-SiC MOSFET transistors is observed from room temperature up to 150°C with positive threshold voltage shift less than 1 V. A small decrease in current with temperature up to 150°C is related to a decrease in the field effect mobility due to phonon scattering. However, the gate oxides contain sodium, which originates from the sintered alumina, resulting in severe device instabilities during negative gate bias stressing.